IP Library Granted Patent US 8,879,309
Granted Patent B2
US 8,879,309 · App. 13/914,396 · Granted Nov 4, 2014

Method and apparatus for programming a spin-transfer torque magnetic random access memory (STTMRAM) array

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Quick Facts
Patent No.
US 8,879,309
App. No.
13/914,396
Granted
Nov 4, 2014
Kind
B2
Abstract

A spin-transfer torque memory random access memory (STTMRAM) cell is disclosed comprising a selected magnetic tunnel junction (MTJ) identified to be programmed; a first transistor having a first port, a second port and a gate, the first port of the first transistor coupled to the selected MTJ; a first neighboring MTJ coupled to the selected MTJ through the second port of the first transistor; a second transistor having a first port, a second port, and a gate, the first port of the second transistor coupled to the selected MTJ; a second neighboring MTJ coupled to the selected MTJ through the second port of the second transistor; a first bit/source line coupled to the second end of the selected MTJ; and a second bit/source line coupled to the second end of the first neighboring MTJ and the second end of the second neighboring MTJ.

Claims (26)

1. A spin-transfer torque magnetic random access memory (STTMRAM) array comprising:

a selected magnetic tunnel junction (MTJ) to be programmed by switching the state thereof upon application of a switching current, the selected MTJ coupled to a first transistor and a second transistor;

a first neighboring MTJ coupled to the first transistor; and

a second neighboring MTJ coupled to the second transistor,

wherein during programming of the selected MTJ, a first current flows through the first transistor and a second current flows through the second transistor and the first current is equal to or less than twenty five percent (25%) of the second current.

2. The STTMRAM array of claim 1 , wherein the second current is the maximum current that the second transistor can supply.

3. The STTMRAM array of claim 1 , wherein the first current is between ten percent (10%) to twenty percent (20%) of the second current.

4. The STTMRAM array of claim 1 , wherein the first current is equal to or less than the current flowing through the first neighboring MTJ during a read operation of the first neighboring MTJ.

5. The STTMRAM array of claim 4 , wherein the first neighboring MTJ is programmed prior to programming of the selected MTJ.

6. The STTMRAM array of claim 1 , wherein the first neighboring MTJ does not store data and is a sacrificial MTJ.

7. The STTMRAM array of claim 1 , wherein the second neighboring MTJ is not programmed prior to programming of the selected MTJ.

8. The STTMRAM array of claim 7 , wherein the second neighboring MTJ does not store data and is a sacrificial MTJ.

9. A spin-transfer torque magnetic random access memory (STTMRAM) array comprising:

a selected magnetic tunnel junction (MTJ) to be programmed by switching the state thereof upon application of a switching current, the selected MTJ having a first end and a second end;

a first transistor having a first port, a second port and a gate, the first port of the first transistor coupled to the selected MTJ at the first end of the selected MTJ;

a first neighboring MTJ having a first end and a second end, the first end of the first neighboring MTJ coupled to the second port of the first transistor;

a second transistor having a first port, a second port, and a gate, the first port of the second transistor coupled to the selected MTJ at the first end of the selected MTJ;

a second neighboring MTJ having a first end and a second end, the first end of the second neighboring MTJ coupled to the second port of the second transistor,

wherein during programming of the selected MTJ, a first current flows through the first transistor and a second current flows through the second transistor and the first current is equal to or less than twenty five percent (25%) of the second current.

10. The STTMRAM array of claim 9 , wherein the second current is the maximum current that the second transistor can supply.

11. The STTMRAM array of claim 9 , wherein the first current is between ten percent (10%) to twenty percent (20%) of the second current.

12. The STTMRAM array of claim 9 , wherein the first current is equal to or less than the current flowing through the first neighboring MTJ during a read operation of the first neighboring MTJ.

13. The STTMRAM array of claim 12 , wherein the first neighboring MTJ is programmed prior to programming of the selected MTJ.

14. The STTMRAM array of claim 9 , wherein the first neighboring MTJ does not store data and is a sacrificial MTJ.

15. The STTMRAM array of claim 9 , wherein the second neighboring MTJ is not programmed prior to programming of the selected MTJ.

16. The STTMRAM array of claim 15 , wherein the second neighboring MTJ does not store data and is a sacrificial MTJ.

Assignments (6)
SECURITY INTEREST Recorded Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
SECURITY INTEREST Recorded Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
SECURITY INTEREST Recorded Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →