IP Library Granted Patent US 9,812,499
Granted Patent B1
US 9,812,499 · App. 15/221,505 · Granted Nov 7, 2017

Memory device incorporating selector element with multiple thresholds

Inventors: Kimihiro Satoh (Fremont, CA); Hongxin Yang (Newark, CA)
Assignee: Avalanche Technology, Inc.
H01L27/24
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,812,499
App. No.
15/221,505
Granted
Nov 7, 2017
Kind
B1
Abstract

The present invention is directed to a memory device including a memory cell coupled to two wiring lines at two ends thereof. The memory cell includes a memory element, which includes a magnetic free layer and a magnetic reference layer with a tunnel junction layer interposed therebetween, and a bi-directional two-terminal selector element having multiple threshold voltages coupled to the memory element in series. The magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof and the magnetic reference layer has a fixed magnetization direction substantially perpendicular to a layer plane thereof. In an embodiment, the bi-directional two-terminal selector element includes two selector devices with each selector device including two electrodes with a switching layer interposed therebetween. In another embodiment, the bi-directional two-terminal selector element includes a selector device incorporating therein two switching layers.

Claims (19)

1. A memory device comprising a memory cell coupled to two wiring lines at two ends thereof, said memory cell comprising:

a memory element including a magnetic free layer and a magnetic reference layer with a tunnel junction layer interposed therebetween; and

a bi-directional two-terminal selector element coupled to said memory element in series, said bi-directional two-terminal selector element including two selector devices having different threshold voltages coupled in series.

2. The memory device of claim 1 , wherein said magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof and said magnetic reference layer has a fixed magnetization direction substantially perpendicular to a layer plane thereof.

3. The memory device of claim 1 , wherein each of said two selector devices includes two electrode layers with a switching layer interposed therebetween.

4. The memory device of claim 3 , wherein said two electrode layers are made of a same material.

5. The memory device of claim 3 , wherein said two electrode layers are made of different materials.

6. The memory device of claim 3 , wherein said switching layers of said two selector devices have different compositions.

7. The memory device of claim 3 , wherein said switching layers of said two selector devices have a same composition but different thicknesses.

8. The memory device of claim 3 , wherein at least one of said switching layers of said two selector devices comprises a chalcogenide or oxide.

9. A memory device comprising a memory cell coupled to two wiring lines at two ends thereof, said memory cell including:

a memory element including a magnetic free layer and a magnetic reference layer with a tunnel junction layer interposed therebetween; and

a bi-directional two-terminal selector element coupled to said memory element in series, said bi-directional two-terminal selector element including at least two switching layers having different threshold voltages and a plurality of electrodes separated by said at least two switching layers.

10. The memory device of claim 9 , wherein said magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof and said magnetic reference layer has a fixed magnetization direction substantially perpendicular to a layer plane thereof.

11. The memory device of claim 9 , wherein said at least two switching layers have different compositions.

12. The memory device of claim 9 , wherein said at least two switching layers have a same composition but different thicknesses.

13. The memory device of claim 9 , wherein at least one of said at least two switching layers comprises a chalcogenide or oxide.

14. The memory device of claim 9 , wherein said plurality of electrodes have a same composition.

15. The memory device of claim 9 , wherein said plurality of electrodes have different compositions.

Assignments (7)
SECURITY INTEREST Recorded Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
SECURITY INTEREST Recorded Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
SECURITY INTEREST Recorded Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2016
From: SATOH, KIMIHIRO; YANG, HONGXIN
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 039493/0032 →