IP Library Granted Patent US 8,772,888
Granted Patent B2
US 8,772,888 · App. 13/572,197 · Granted Jul 8, 2014

MTJ MRAM with stud patterning

Inventors: Dong Ha Jung (Pleasanton, CA); Kimihiro Satoh (Beaverton, OR); Jing Zhang (Los Altos, CA); Yuchen Zhou (San Jose, CA); Yiming Huai (Pleasanton, CA)
Assignee: Avalanche Technology Inc.
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Quick Facts
Patent No.
US 8,772,888
App. No.
13/572,197
Granted
Jul 8, 2014
Kind
B2
Abstract

Use of a multilayer etching mask that includes a stud mask and a removable spacer sleeve for MTJ etching to form a bottom electrode that is wider than the rest of the MTJ pillar is described. The first embodiment of the invention described includes a top electrode and a stud mask. In the second and third embodiments the stud mask is a conductive material and also serves as the top electrode. In embodiments after the stud mask is formed a spacer sleeve is formed around it to initially increase the masking width for a phase of etching. The spacer is removed for further etching, to create step structures that are progressively transferred down into the layers forming the MTJ pillar. In one embodiment the spacer sleeve is formed by net polymer deposition during an etching phase.

Claims (26)

1. An MRAM cell comprising:

a contact stud with an upper surface that is coplanar with an upper surface of a first dielectric material surrounding the contact stud, the contact stud having a first width;

a bottom electrode with a generally flat lower surface in contact with the upper surface of the contact stud and the upper surface of the first dielectric material surrounding the contact stud, the lower surface of the bottom electrode having a second width that is greater than the first width of the contact stud;

an MTJ in contact with the bottom electrode, the MTJ having a third width that is less than the second width of bottom electrode;

a dielectric capping layer in contact with the MTJ;

a top electrode in contact with the dielectric capping layer; and

a stud etching mask with a lower surface in contact with an upper surface of the top electrode, the lower surface of the stud etching mask being coextensive with the upper surface of the top electrode.

2. An MRAM cell comprising:

a contact stud with an upper surface that is coplanar with an upper surface of a first dielectric material surrounding the contact stud, the contact stud having a first width;

a bottom electrode with a generally flat lower surface in contact with the upper surface of the contact stud and the upper surface of the first dielectric material surrounding the contact stud, the lower surface of the bottom electrode having a second width that is greater than the first width of the contact stud;

an MTJ in contact with the bottom electrode, the MTJ having a third width that is less than the second width of bottom electrode;

a dielectric capping layer in contact with the MTJ; and

a stud etching mask with a lower surface in contact with an upper surface of the dielectric capping layer, the lower surface of the stud etching mask being coextensive with the upper surface of the dielectric capping layer.

3. An MRAM cell comprising:

a contact stud with an upper surface that is coplanar with an upper surface of a first dielectric material surrounding the contact stud, the contact stud having a first width;

a bottom electrode with a generally flat lower surface in contact with the upper surface of the contact stud and the upper surface of the first dielectric material surrounding the contact stud, the lower surface of the bottom electrode having a second width that is greater than the first width of the contact stud;

an MTJ in contact with the bottom electrode, the MTJ having a third width that is less than the second width of bottom electrode;

a capping layer in contact with the MTJ;

a top electrode in contact with the capping layer; and

a stud etching mask with a lower surface in contact with an upper surface of the top electrode, the lower surface of the stud etching mask being coextensive with the upper surface of the top electrode.

4. An MRAM cell comprising:

a contact stud with an upper surface that is coplanar with an upper surface of a first dielectric material surrounding the contact stud, the contact stud having a first width;

a bottom electrode with a generally flat lower surface in contact with the upper surface of the contact stud and the upper surface of the first dielectric material surrounding the contact stud, the lower surface of the bottom electrode having a second width that is greater than the first width of the contact stud;

an MTJ in contact with the bottom electrode, the MTJ having a third width that is less than the second width of bottom electrode;

a capping layer in contact with the MTJ; and

a stud etching mask with a lower surface in contact with an upper surface of the capping layer, the lower surface of the stud etching mask being coextensive with the upper surface of the capping layer.

Assignments (7)
SECURITY INTEREST Recorded Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
SECURITY INTEREST Recorded Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
SECURITY INTEREST Recorded Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2012
From: JUNG, DONG HA; SATOH, KIMIHIRO; ZHANG, JING; ZHOU, YUCHEN; HUAI, YIMING
To: AVALANCHE TECHNOLOGY INC.
Reel/Frame 028767/0102 →
Continuity (1)
Related Publication 20140042567A1 · Feb 13, 2014