IP Library Granted Patent US 9,658,859
Granted Patent B2
US 9,658,859 · App. 14/091,318 · Granted May 23, 2017

Method of implementing magnetic random access memory (MRAM) for mobile system-on chip boot

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Quick Facts
Patent No.
US 9,658,859
App. No.
14/091,318
Granted
May 23, 2017
Kind
B2
Abstract

A method of booting a system on chip (SoC) includes using an on-chip MRAM located in the SoC, to store a boot software that includes a start-up software, boot loaders, and kernel and user-personalized information in an on-chip magnetic random access memory (MRAM) located in and residing on the same semiconductor as the SoC. The method further includes directly executing the boot software from the on-chip MRAM by the SoC and directly accessing the user-personalized information from the MRAM by the SoC.

Claims (12)

1. A method of booting a system on chip (SoC) comprising:

directly executing a boot software from an on-chip magnetic random access memory (MRAM) located in and residing on a same semiconductor as the SoC, the on-chip MRAM being configured for permanently storing user-personalized information and the boot software including a start-up software, boot loaders, and a kernel;

directly accessing the user-personalized information from the on-chip MRAM by the SoC;

storing an operating system (OS) software, an application software, and a user area on an external MRAM;

directly executing the operating system software from the external MRAM by the SoC without loading the operating system into a volatile memory, the operating system software including file systems;

directly executing the application software from the external MRAM by the SoC without loading the application software into a volatile memory; and

directly accessing user data in the user area from the external MRAM by the SoC,

wherein the external MRAIVI is coupled to the SoC and is configured for permanently storing the operating system software, the application software, and the user data.

2. The method of booting a system on chip (SoC), as recited in claim 1 , wherein required parameters for the execution of the boot software and the operating system software and the application software are accessed directly from the on-chip MRAM.

3. The method of booting a system on chip (SoC), as recited in claim 1 , wherein the on-chip MRAM includes one or more partitions with the boot software, the user-personalized information, and a scratch-pad memory space occupying separate partitions.

4. The method of booting a system on chip (SoC), as recited in claim 1 , wherein the on-chip MRAM comprises a plurality of fixed and configurable partitions of memory.

5. The method of booting a system on chip (SoC), as recited in claim 3 , wherein the SoC includes a compressed kernel software and the method further includes the steps of decompressing the compressed kernel software to the scratch-pad memory space and executing the decompressed kernel software directly from the scratch-pad memory space.

Assignments (7)
SECURITY INTEREST Recorded Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
SECURITY INTEREST Recorded Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
SECURITY INTEREST Recorded Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 26, 2013
From: LE, NGON VAN; TADEPALLI, RAVISHANKAR
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 031683/0053 →