Method of reading from and writing to magnetic random access memory (MRAM)
View Patent ↗A method of writing to a magnetic memory cell that includes selecting a magnetic memory cell having a pair of MTJs, and based on whether the selected magnetic memory cell is an ‘odd’ magnetic memory cell or an ‘even’ magnetic memory cell and a state to which the selected magnetic memory cell is being written, setting a distinct bit line (BL), coupled to a first MTJ of the pair of MTJs or a second MTJ of the pair of MTJs, to a voltage level indicative of a certain state that causes current to flow through the pair of MTJs in a manner that causes the direction of current flow through one of the first or second MTJs to be in a direction opposite to that of the other one of the first or second MTJs to program the first and second MTJs in opposite states.
1. A method of reading a magnetic memory cell comprising a pair of magnetic tunnel junctions (MTJs) programmed in opposite states by selecting a magnetic memory cell of a magnetic memory array to be read, the magnetic memory cell including a pair of MTJs, an access transistor coupled between a first MTJ of the pair of MTJs and a second MTJ of the pair of MTJs, the method comprising:
turning ‘off’ a first word line coupled to a first access transistor that is directly coupled to a first MTJ of a pair of MTJs of a magnetic memory cell and to a second MTJ of the pair of MTJs;
turning ‘on’” a second and a third word lines, the second word line coupled to a second access transistor and the third word line coupled to a third access transistor;
turning ‘on’ the second and third access transistors;
depending on whether the magnetic memory cell is ‘even’ or ‘odd’, turning ‘on’ ‘even’ or ‘odd’ bit lines and floating the remaining bit lines;
comparing the current flowing through the first MTJ of the pair of MTJs to the current through the second MTJ of the pair of MTJs; and
based on the comparison, declaring the state of the magnetic memory cell.
2. The method of reading, as recited in claim 1 , wherein if the magnetic memory cell is ‘odd’, setting the ‘even’ bit lines ‘high’ and floating the ‘odd’ bit lines.
3. The method of reading, as recited in claim 2 , wherein if the magnetic memory cell is ‘even’, setting the ‘odd’ bit lines ‘high’ and floating the ‘odd’ bit lines.
4. The method of reading, as recited in claim 1 , wherein if the magnetic memory cell is ‘odd’, setting the ‘even’ bit lines ‘low’ and floating the ‘odd’ bit lines.
5. The method of reading, as recited in claim 4 , wherein if the magnetic memory cell is ‘even’, setting the ‘odd’ bit lines ‘low’ and floating the ‘odd’ bit lines.