IP Library Granted Patent US 7,981,697
Granted Patent B2
US 7,981,697 · App. 12/791,737 · Granted Jul 19, 2011

Current-confined effect of magnetic nano-current-channel (NCC) for magnetic random access memory (MRAM)

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Quick Facts
Patent No.
US 7,981,697
App. No.
12/791,737
Granted
Jul 19, 2011
Kind
B2
Abstract

One embodiment of the present invention includes a memory element having a composite free layer including a first free sub-layer formed on top of the bottom electrode, a nano-current-channel (NCC) layer formed on top of the first free sub-layer, and a second free sub-layer formed on top of the NCC layer, wherein when switching current is applied to the memory element, in a direction that is substantially perpendicular to the layers of the memory element, local magnetic moments of the NCC layer switch the state of the memory element.

Claims (52)

1. A method of manufacturing a magnetic memory element comprising:

depositing a seed layer on top of a bottom electrode;

depositing a first free sub-layer on top of the seed layer, the seed layer being made of CrRu;

depositing a nano-current-channel (NCC) layer on top of the first free sub-layer;

depositing a second free sub-layer on top of the NCC layer, the first free sub-layer, the NCC layer and the second free sub-layer forming a composite free layer, the first and second free sub-layers being made of the same material, grains of a substantially cylindrical shape dispersed throughout the NCC layer and surrounded by a matrix, the composite free layer responsive to a current and when the current is applied to and flows bidirectionally through the layers of the magnetic memory element, the first free sub-layer and the second free sub-layer being exchange coupled to the grains, each of the grains having a magnetic moment and the magnetic moment of each of the grains switching locally and within the grain when switching current flows through the magnetic memory element thereby reducing the switching current, the grains made of a conducting material having high spin polarization ratio and being magnetically soft;

forming a spacer layer on top of the composite free layer; and

forming a fixed layer formed on top of the spacer layer on top of which is formed a top electrode,

wherein when current is applied, in a direction that is substantially perpendicular to the layers of the memory element, local magnetic moments of the NCC layer switch the state of the memory element.

2. The method of manufacturing, as recited in claim 1 , wherein the fixed layer and the composite free layer each have perpendicular magnetocrystalline anisotropy.

3. The method of manufacturing, as recited in claim 1 , wherein the second free sub-layer is non-nickel based.

4. The method of manufacturing, as recited in claim 1 , wherein the top and bottom electrodes are each made of copper (Cu) or aluminum (Al).

5. The method of manufacturing, as recited in claim 1 , wherein each of the first and second free sub-layers is made of an alloy selected from a group consisting of: cobolt iron (CoFe), iron (Fe), iron nickel (FeNi), iron cobolt nickel (FeCoNi), iron plantinum (FePt), Fe 3 Pt, cobolt plantinum (CoPt), Co 3 Pt, and multi-layers of cobolt and palladium.

6. The method of manufacturing, as recited in claim 5 , wherein each of the first and second free sub-layers is further made of a material selected from a group consisting of:

Boron (B), nitrogen (N), carbon (C), and silicon (Si).

7. The method of manufacturing, as recited in claim 1 , wherein the grains are made of magnetically soft material.

8. The method of manufacturing, as recited in claim 1 , wherein the matrix is made of an insulating material.

9. The method of manufacturing, as recited in claim 1 , wherein the grains are made of iron silicon (FeSi).

10. The method of manufacturing, as recited in claim 1 , wherein the matrix is made of silicon dioxide (SiO 2 ).

11. The method of manufacturing, as recited in claim 1 , wherein the NCC layer is made of a material selected from a group consisting of: magnesim oxide (MgO), silicon dioxide (SiO 2 ), titanium dioxide (TiO 2 ), and alumina (Al 2 O 3 ).

12. The method of manufacturing, as recited in claim 1 , wherein the spacer layer is made of magnesium oxide (MgO).

13. The method of manufacturing, as recited in claim 12 , wherein the layer is further made of a thin layer of magnesium (Mg).

14. The method of manufacturing, as recited in claim 1 , wherein the spacer layer is made of a material selected from a group consisting of: aluminum oxide (Al 2 O 3 ), titanium dioxide (TiO 2 ), AlO, CrO 2 ,and germanium (Ge).

15. The method of manufacturing, as recited in claim 1 , wherein the fixed layer is made of a material selected from a group consisting of: cobolt iron (CoFe), iron (Fe), iron nickel (FeNi), iron cobolt nickel (FeCoNi), iron plantinum (FePt), Fe 3 Pt, cobolt plantinum (CoPt), Co 3 Pt, multi-layers of cobolt and palladium [Co/Pd] n , and cobolt nickel [Co/Ni] n, .

16. The method of manufacturing, as recited in claim 15 , wherein the fixed layer is further made of a material selected from a group consisting of: Boron (B), nitrogen (N), carbon (C), silicon (Si) or any other element that has low solubility in the foregoing elements.

17. The method of manufacturing, as recited in claim 1 , wherein the composite free layer is made of a material selected from a group consisting of: chemically ordered L10 phase FePt, CoPt, chemically ordered bct-structured FeCo, ordered Fe16N2, [Co/Pt]n an [Co/Pd]n where ‘n’ is an integer.

18. The method of manufacturing, as recited in claim 1 , further including a pinning layer formed on top of the fixed layer and below the top electrode.

19. The method of manufacturing, as recited in claim 18 , wherein the pinning layer is made of a material selected from a group consisting of: iridium manganese (IrMn), Platinum manganese (PtMn), and nickel manganese (NiMn).

20. The method of manufacturing, as recited in claim 1 , further including (001) crystalline structured MgO layer formed between the bottom electrode and the seed layer.

21. The method of manufacturing, as recited in claim 1 , further forming a (002) textured underlayer formed between the seed layer and the bottom electrode.

22. The method of manufacturing, as recited in claim 1 , wherein the spacer layer is made of copper (Cu) or aluminum (Al).

23. A method of manufacturing a magnetic memory element comprising:

depositing a seed layer on top of a bottom electrode;

depositing a first free sub-layer on top of the seed layer, the seed layer being made of a material selected from a group consisting of: rhodium aluminum (RuAl), TiN, CrW, CrX (X being either tungsten (W), and aluminum (Al);

depositing a nano-current-channel (NCC) layer on top of the first free sub-layer;

depositing a second free sub-layer on top of the NCC layer, the first free sub-layer, the NCC layer and the second free sub-layer forming a composite free layer, the first and second free sub-layers being made of the same material, grains of a substantially cylindrical shape dispersed throughout the NCC layer and surrounded by a matrix, the composite free layer responsive to a current and when the current is applied to and flows bidirectionally through the layers of the magnetic memory element, the first free sub-layer and the second free sub-layer being exchange coupled to the grains, each of the grains having a magnetic moment and the magnetic moment of each of the grains switching locally and within the grain when switching current flows through the magnetic memory element thereby reducing the switching current, the grains made of a conducting material having high spin polarization ratio and being magnetically soft;

forming a spacer layer on top of the composite free layer; and

forming a fixed layer formed on top of the spacer layer on top of which is formed a top electrode.

24. The method of manufacturing, as recited in claim 23 , further including (001) crystalline structured MgO layer formed between the bottom electrode and the seed layer.

25. The method of manufacturing, as recited in claim 23 , further forming a (002) textured underlayer formed between the seed layer and the bottom electrode.

26. The method of manufacturing, as recited in claim 23 , wherein the spacer layer is made of MgO.

27. The method of manufacturing, as recited in claim 23 , wherein the spacer layer is made of copper (Cu) or aluminum (Al).

28. The method of manufacturing, as recited in claim 23 , wherein the fixed layer and the composite free layer each have perpendicular magnetocrystalline anisotropy.

29. The method of manufacturing, as recited in claim 23 , wherein the second free sub-layer is non-nickel based.

30. The method of manufacturing, as recited in claim 23 , wherein the top and bottom electrodes are each made of copper (Cu) or aluminum (Al).

31. The method of manufacturing, as recited in claim 23 , wherein each of the first and second free sub-layers is made of an alloy selected from a group consisting of: cobolt iron (CoFe), iron (Fe), iron nickel (FeNi), iron cobolt nickel (FeCoNi), iron plantinum (FePt), Fe 3 Pt, cobolt plantinum (CoPt), Co 3 Pt, and multi-layers of cobolt and palladium.

32. The method of manufacturing, as recited in claim 30 , wherein each of the first and second free sub-layers is further made of a material selected from a group consisting of:

Boron (B), nitrogen (N), carbon (C), and silicon (Si).

33. The method of manufacturing, as recited in claim 23 , wherein the grains are made of magnetically soft material.

34. The method of manufacturing, as recited in claim 23 , wherein the matrix is made of an insulating material.

35. The method of manufacturing, as recited in claim 23 , wherein the grains are made of iron silicon (FeSi).

36. The method of manufacturing, as recited in claim 23 , wherein the matrix is made of silicon dioxide (SiO 2 ).

37. The method of manufacturing, as recited in claim 23 , wherein the NCC layer is made of a material selected from a group consisting of: magnesim oxide (MgO), silicon dioxide (SiO 2 ), titanium dioxide (TiO 2 ), and alumina (Al 2 O 3 ).

Assignments (6)
SECURITY INTEREST Recorded Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
SECURITY INTEREST Recorded Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
SECURITY INTEREST Recorded Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →