Storage system employing MRAM and physically addressed solid state disk
View Patent ↗A storage system includes a Central Processing Unit (CPU) that has a physically-addressed solid state disk (SSD), addressable using physical addresses associated with user data and provided by a host. The user data is to be stored in or retrieved from the physically-addressed SSD in blocks. Further, a non-volatile memory module is coupled to the CPU and includes flash tables used to manage blocks in the physically addressed SSD. The flash tables have tables that are used to map logical to physical blocks for identifying the location of stored data in the physically addressed SSD. The flash tables are maintained in the non-volatile memory modules thereby avoiding reconstruction of the flash tables upon power interruption.
1. A storage system comprising:
a Central Processing Unit (CPU) responsive to one or more commands including user data and logical addresses identifying the user data, the CPU including a PCIe controller;
a plurality of physically-addressed solid state disk (SSDs) configured to store the user data and individually coupled, through a PCIe bus, to the CPU and individually responsive to one or more queued commands, each of the queued commands including a physical address and using the physical addresses to identify the location of the user data to be stored in or retrieved from at least one of the plurality of physically-addressed SSDs in blocks, each of the plurality of physically-addressed SSDs being located externally to the CPU, the PCIe controller coupled to the plurality of physically-addressed SSDs;
a non-volatile memory module coupled to the CPU, the non-volatile memory module including flash tables used to manage blocks in the physically-addressed SSD, the flash tables including tables used to map logical to physical addresses for identifying the location of stored user data in physically-addressed SSD; and
a network interface controller coupled through a second PCIe bus to the CPU, the network interface controller further coupled to the PCIe controller,
wherein the flash tables are maintained in the non-volatile memory modules thereby avoiding reconstruction of the flash tables upon power interruption.
2. The storage system, as recited in claim 1 , wherein the physically-addressed solid state disk (SSD) includes a flash subsystem, further wherein the flash subsystem is made of flash NAND memory.
3. The storage system, as recited in claim 1 , wherein the plurality of physically-addressed solid state disk (SSD) is coupled through a flash bus to the CPU.
4. The storage system, as recited in claim 1 , wherein the non-volatile memory module includes MRAM.
5. The storage system, as recited in claim 1 , wherein the non-volatile memory module includes STTMRAM.
6. The storage system, as recited in claim 1 , wherein the non-volatile memory module is coupled to the CPU through a NV memory channel.
7. The storage system, as recited in claim 6 , wherein the NV memory channel is a DRAM memory channel.
8. The storage system, as recited in claim 1 , wherein the NV memory module is coupled to the CPU via a system bus.
9. The storage system, as recited in claim 1 , further including a system memory coupled to the CPU and configured to store software driver for managing the flash tables.
10. The storage system, as recited in claim 1 , wherein the non-volatile memory module is configured to store a cache for caching the user data.
11. The storage system, as recited in claim 1 , wherein the non-volatile memory module is configured to store a journal for logging changes before committing the changes.
12. The storage system, as recited in claim 1 , wherein the PCIe controller is directly connected to the plurality of physically-addressed SSDs.
13. The storage system, as recited in claim 1 , wherein the non-volatile memory module includes flash memory into which the flash tables are stored, further wherein, the plurality of physically-addressable SSDs are written to in units of blocks and the flash memory is written to in units of pages.
14. A storage system comprising:
a Central Processing Unit (CPU) responsive to one or more commands including user data through a network interface controller (NIC), the commands further including logical addresses identifying user data;
a plurality of physically-addressed solid state disk (SSDs) configured to store the user data and individually coupled, through a PCIe bus, to the CPU and individually responsive to one or more queued commands, each of the queued commands including a physical address and using the physical addresses to identify the location of the user data to be stored in or retrieved from at least one of the plurality of physically-addressed SSDs in blocks, each of the plurality of physically-addressed SSDs being located externally to the CPU;
a system memory coupled to the CPU, the system memory including flash tables used to manage blocks in the physically-addressed SSD, the flash tables including tables used to map logical to physical blocks for identifying the location of stored data in the physically-addressed SSD; and
a network interface controller coupled through a second PCIe bus to the CPU,
wherein each of the physically-addressable SSDs includes a flash subsystem that includes flash memory configured to save snapshots of the flash tables including a previous version of the flash tables and a current version of the flash tables under the direction of the CPU, a non-volatile memory module including a magnetic random access memory (MRAM) configured to store changes to the flash tables,
wherein the current version of the snapshot of the flash tables is used to reconstruct the flash tables upon power interruption,
further wherein the flash tables are substantially periodically saved in the plurality of physically-addressed SSDs, and parts of the flash tables that are updated since a previous save are saved in the non-volatile memory module.
15. The storage system, as recited in claim 14 , wherein the flash subsystem is made of flash NAND memory.
16. The storage system, as recited in claim 14 , wherein the plurality of physically-addressed SSD are coupled through a flash bus to the CPU.
17. The storage system, as recited in claim 14 , wherein the non-volatile memory module includes MRAM.
18. The storage system, as recited in claim 14 , wherein the non-volatile memory module includes STTMRAM.
19. The storage system, as recited in claim 14 , wherein the non-volatile memory module is coupled to the CPU through a memory channel.
20. The storage system, as recited in claim 19 , wherein the non-volatile memory module is a DRAM memory channel.
21. The storage system, as recited in claim 14 , wherein the non-volatile memory module is coupled to the CPU via a system bus.
22. The storage system, as recited in claim 14 , wherein system memory is configured to store a software driver for managing the flash tables.
23. The storage system, as recited in claim 14 , wherein the non-volatile memory module is configured to store a cache for caching the user data.
24. The storage system, as recited in claim 14 , wherein the non-volatile memory module is configured to store a journal for logging changes before committing the changes.
25. The storage system, as recited in claim 14 , wherein the PCIe controller is directly connected to the plurality of physically-addressed SSDs.
26. A computer system comprising:
a Central Processing Unit (CPU) responsive to one or more commands including user data through a network interface controller (NIC), the commands further including logical addresses identifying user data, the CPU including a PCIe controller;
a plurality of physically-addressed solid state disk (SSDs) configured to store the user data and individually coupled, through a PCIe bus, to the CPU and individually responsive to one or more queued commands, each of the queued commands including a physical address and using the physical addresses to identify the location of the user data the user data to be stored in or retrieved from at least one of the plurality of physically-addressed SSDs in blocks, each of the plurality of physically-addressed SSDs being located externally to the CPU, the PCIe controller coupled to the plurality of physically-addressed SSDs;
a non-volatile memory module coupled to the CPU, the non-volatile memory module including flash tables used to manage blocks in the physically-addressed SSD, the flash tables including tables used to map logical to physical addresses for identifying the location of stored user data in the physically-addressed SSD,
a network interface controller coupled through a second PCIe bus to the CPU, the network interface controller further coupled to the PCIe controller; and
wherein the flash tables are maintained in the non-volatile memory modules thereby avoiding reconstruction of the flash tables upon power interruption.
27. The computer system, as recited in claim 26 , wherein the non-volatile memory module is configured to store a cache for caching the user data.
28. The computer system, as recited in claim 26 , wherein the non-volatile memory module is configured to store a journal for logging changes before committing the changes.
29. The computer system, as recited in claim 26 , wherein the PCIe controller is directly connected to the plurality of physically-addressed SSDs.
30. A computer system comprising:
a Central Processing Unit (CPU) responsive to one or more commands including user data through a network interface controller (NIC), the commands further including logical addresses identifying user data;
a plurality of physically-addressed solid state disk (SSDs) configured to store the user data and individually coupled, through a PCIe bus, to the CPU and individually responsive to one or more queued commands, each of the queued commands including a physical address and using the physical addresses to identify the location of the user data the user data to be stored in or retrieved from at least one of the plurality of physically-addressed SSDs in blocks, each of the plurality of physically-addressed SSDs being located externally to the CPU;
a system memory coupled to the CPU, the system memory including flash tables used to manage blocks in the physically-addressed SSD, the flash tables including tables used to map logical to physical blocks for identifying the location of stored data in the physically-addressed SSD; and
a network interface controller coupled through a second PCIe bus to the CPU,
wherein each of the physically-addressable SSDs includes a flash subsystem that includes flash memory configured to save snapshots of the flash tables including a previous version of the flash tables and a current version of the flash tables under the direction of the CPU, a non-volatile memory module including a magnetic random access memory (MRAM) configured to store changes to the flash tables,
wherein the current version of the snapshot of the flash tables is used to reconstruct the flash tables upon power interruption,
further wherein the flash tables are substantially periodically saved in the plurality of physically-addressed SSDs, and parts of the flash tables that are updated since a previous save are saved in the non-volatile memory module.
31. The computer system, as recited in claim 30 , wherein the non-volatile memory module is configured to store a cache for caching the user data.
32. The computer system, as recited in claim 30 , wherein the non-volatile memory module is configured to store a journal for logging changes before committing the changes.
33. The computer system, as recited in claim 30 , wherein the PCIe controller is directly connected to the plurality of physically-addressed SSDs.