IP Library Granted Patent US 9,558,802
Granted Patent B2
US 9,558,802 · App. 15/203,455 · Granted Jan 31, 2017

Fast programming of magnetic random access memory (MRAM)

Inventors: Ebrahim Abedifard (San Jose, CA); Parviz Keshtbod (Los Altos Hills, CA)
Assignee: Avalanche Technology, Inc.
G11C11/1675G11C11/1653
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,558,802
App. No.
15/203,455
Granted
Jan 31, 2017
Kind
B2
Abstract

A method of programming an MTJ includes selecting an MTJ that is coupled to an access transistor at the drain of the access transistor. The gate of the access transistor is coupled to a selected word line (WL), the selected WL being substantially at a first voltage, Vdd; whereas the WLs that are not coupled to the MTJ are left to float. A second voltage, Vx, is applied to the unselected bit lines (BLs) and further applied to a source line (SL), the SL being coupled to the source of the access transistor. A third voltage, Vdd or 0 Volts, is applied to a selected BL, the selected BL being coupled the MTJ. The first voltage is applied to a SL, the SL being coupled to the source of the access transistor thereby causing the WL to boot above the first voltage.

Claims (7)

1. A method of programming a magnetoresistive tunnel junction (MTJ) coupled to a transistor, the transistor having a gate, a source, and a drain, the method comprising:

booting the voltage of a word line (WL) to a voltage substantially of Vddx volts, Vddx being substantially the sum of Vdd voltage and Vx voltage, the Vx voltage being greater than 0 volts and less than Vdd volts;

setting the voltage of a bit line (BL) to substantially the Vdd volts, the BL coupled to an end of the MTJ, the drain of the access transistor being coupled to an opposite end of the MTJ, a source line (SL) coupled to the source of the access transistor;

raising the SL to be substantially at Vx volts; and

programming the MTJ to a parallel state.

2. The method of programming, as recited in claim 1 , further including increasing the speed of programming by raising the voltage of the SL to Vx volts.

3. The method of programming, as recited in claim 1 , wherein the resistive element includes an MTJ.

Assignments (7)
SECURITY INTEREST Recorded Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
SECURITY INTEREST Recorded Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
SECURITY INTEREST Recorded Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2016
From: ABEDIFARD, EBRAHIM; KESHTBOD, PARVIZ
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 039089/0098 →
Continuity (3)
Division 14253192 · Apr 15, 2014
Continuation 13842747 · Mar 15, 2013
Related Publication 20160314828A1 · Oct 27, 2016