IP Library Granted Patent US 8,687,418
Granted Patent B1
US 8,687,418 · App. 12/623,369 · Granted Apr 1, 2014

Flash memory with nano-pillar charge trap

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Quick Facts
Patent No.
US 8,687,418
App. No.
12/623,369
Granted
Apr 1, 2014
Kind
B1
Abstract

An embodiment of the present invention includes a non-volatile storage unit comprising a first and second N-diffusion well separated by a distance of P-substrate. A first isolation layer is formed upon the first and second N-diffusion wells and the P-substrate. A nano-pillar charge trap layer is formed upon the first isolation layer and includes conductive nano-pillars interspersed between non-conducting regions. The storage unit further includes a second isolation layer formed upon the nano-pillar charge trap layer; and at least one word line formed upon the second isolation layer and above a region of nano-pillar charge trap layer. The nano-pillar charge trap layer is operative to trap charge upon application of a threshold voltage. Subsequently, the charge trap layer may be read to determine any charge stored in the non-volatile storage unit, where presence or absence of stored charge in the charge trap layer corresponds to a bit value.

Claims (40)

1. A method of storing digital information in a storage unit comprising:

operating a storage unit having:

a first N-diffusion well and a second N-diffusion well, the first and second N-diffusion wells separated by a P-substrate;

a first isolation layer formed upon the first and second N-diffusion wells and the P-substrate;

a graded nano-pillar charge trap layer including a nano-pillar charge trap layer formed upon the first isolation layer comprising conductive nano-pillars interspersed between non-conducting regions, the conductive nano pillars being cylindrical or spherical in shape being made of material comprising: Cobalt (Co), Iron (Fe), and Nickel (Ni);

a second isolation layer formed upon the nano-pillar charge trap layer; and

at least one word line formed upon the second isolation layer;

wherein the nano-pillar charge trap layer is adapted to:

operate in a first mode having associated therewith a first potential, upon application of a threshold current through the at least one word line, and to

operate in a second mode, wherein charge is stored on the nano-pillars of the nano-pillar charge trap layer, and having associated therewith a second potential;

wherein during the first mode, a first bit value is stored in the storage unit, and during the second mode, a second bit value is stored in the storage unit.

2. The method of storing digital information, as recited in claim 1 , wherein each of the conductive nano-pillars is separated from another conductive nano-pillar by a distance of the non-conducting region.

3. The method of storing digital information, as recited in claim 1 , further including a trench formed in the P-substrate, between the first and second N-diffusion wells.

4. The method of storing digital information, as recited in claim 1 , further including an oxide layer formed in the P-substrate, between the first and second N-diffusion wells.

5. The method of storing digital information, as recited in claim 1 , wherein the nano-pillar charge trap layer is positioned centrally between the first N-diffusion well and the second N-diffusion well such that the nano-pillar charge trap layer is vertically offset from the first and second N-diffusion wells.

6. The method of storing digital information, as recited in claim 1 , wherein when voltage is applied during programming, to the storage unit, charges are trapped in the conductive nano-pillars and wherein during reading of the storage unit, the charge trapped in nano-pillars modulate to allow the storage unit to store either the first or the second bit value.

7. The method of storing digital information, as recited in claim 1 , wherein the non-conducting regions are made of material comprising: oxides, nitrides, sulfides, or phosphides.

8. The method of storing digital information, as recited in claim 1 , wherein the non-conducting regions are made of material comprising: oxide selected from one or more of the materials: silicon dioxide (SiO 2 ), titanium dioxide (TiO 2 ), tantalum penatoxide (Ta 2 O 5 ), aluminum oxide (Al 2 O 3 ), zirconium oxide (ZrO 2 ), or hafnium oxide (HfO 2 ).

9. The method of storing digital information, as recited in claim 1 , wherein the non-conducting regions are made of ferro-magnetic materials comprising: SiO 2 , TiO 2 , Ta 2 O 5 , Nb 2 O 5 , ZrO 2 , HfO 2 , TiN, TaN, or Cr 2 O 3 .

10. The method of storing digital information, as recited in claim 1 , wherein the conductive nano-pillars are made of material comprising: Chromium, Tantalum, Niobium, Titanium, Tungsten, Molybdenum, Rubidium, Platinum, or Palladium.

11. The method of storing digital information, as recited in claim 1 , wherein the nano-pillar charge trap layer is made of Cobalt-X, where ‘X’ is an element comprising: chrome, tantalum, titanium or other metallic elements, such as copper or silver.

12. The method of storing digital information, as recited in claim 1 , wherein the nano-pillar charge trap layer is made of Co—X-titanium dioxide (TiO 2 ), where ‘X’ is an element comprising: chrome, tantalum, titanium or other metallic elements, such as copper or silver.

13. A storage unit comprising:

a first N-diffusion well and a second N-diffusion well, the first and second N-diffusion wells separated by a P-substrate;

a first isolation layer formed upon the first and second N-diffusion wells and the P-substrate;

a graded nano-pillar charge trap layer including a nano-pillar charge trap layer formed upon the first isolation layer comprising conductive nano-pillars interspersed between non-conducting regions, the conductive nano-pillars being cylindrical or spherical in shape and made of material comprising: Cobalt (Co), Iron (Fe), and Nickel (Ni);

a second isolation layer formed upon the nano-pillar charge trap layer; and

at least one word line formed upon the second isolation layer;

wherein the nano-pillar charge trap layer is adapted to:

operate in a first mode having associated therewith a first potential, upon application of a threshold current through the at least one word line, and to

operate in a second mode, wherein charge is stored on the nano-pillars of the nano-pillar charge trap layer, and having associated therewith a second potential;

wherein during the first mode, a first bit value is stored in the storage unit, and during the second mode, a second bit value is stored in the storage unit.

14. The storage unit, as recited in claim 13 , wherein each of the conductive nano-pillars is separated from another conductive nano-pillar by a distance of the non-conducting region.

15. The storage unit, as recited in claim 13 , further including a trench formed in the P-substrate, between the first and second N-diffusion wells.

16. The storage unit, as recited in claim 13 , further including an oxide layer formed in the P-substrate, between the first and second N-diffusion wells.

17. The storage unit, as recited in claim 13 , wherein the nano-pillar charge trap layer is positioned centrally between the first N-diffusion well and the second N-diffusion well such that the nano-pillar charge trap layer is vertically offset from the first and second N-diffusion wells.

18. The storage unit, as recited in claim 13 , wherein when voltage is applied during programming, to the storage unit, charges are trapped in the conductive nano-pillars and wherein during reading of the storage unit, the charge trapped in nano-pillars modulate to allow the storage unit to store either the first or the second bit value.

19. The storage unit, as recited in claim 13 , wherein the non-conducting regions are made of material comprising: oxides, nitrides, sulfides, or phosphides.

20. The storage unit, as recited in claim 13 , wherein the non-conducting regions further include at least one of the following materials: Chromium (Cr), Tantalum (Ta), Titanium (Ti), Niobium (Nb), or Molybdenum (Mo).

21. The method of storing digital information, as recited in claim 1 , wherein the non-conducting regions further include at least one of the following materials: Chromium (Cr), Tantalum (Ta), Titanium (Ti), Niobium (Nb), or Molybdenum (Mo).

Assignments (8)
SECURITY INTEREST Recorded Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
SECURITY INTEREST Recorded Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
SECURITY INTEREST Recorded Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →
CHANGE OF NAME Recorded Apr 20, 2010
From: YADAV TECHNOLOGY, INC.
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 024258/0835 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2010
From: RANJAN, RAJIV YADAV; ABEDIFARD, EBRAHIM; ESTAKHRI, PETRO; KESHTBOD, PARVIZ
To: YADAV TECHNOLOGY INC.
Reel/Frame 023824/0802 →