Magnetic tunnel junction (MTJ) formation using multiple etching processes

1. A method of manufacturing a magnetic memory element comprising:

forming a permanent magnetic layer on top of a bottom electrode;

forming a pinning layer on top the permanent magnetic layer;

forming a magnetic tunnel junction (MTJ) including a barrier layer on top of the pinning layer;

forming a top electrode on top of the MTJ;

forming a hard mask on top of the top electrode;

using the hard mask, performing a plurality of etching processes to reduce the width of the MTJ and the top electrode to substantially a desired width; and

stopping one of the plurality of etching processes when detecting a predetermined material in the pinning layer thereby avoiding deposition of metal onto the barrier layer of the MTJ during the performing a plurality of etching processes step.

2. The method of manufacturing, as recited in claim 1 , wherein further forming a fixed layer on top of the pinning layer and a free layer on top of the barrier layer, the fixed layer, the barrier layer and the free layer collectively forming the MTJ.

3. The method of manufacturing, as recited in claim 2 , wherein the fixed layer and the free layer each including metal material.

4. The method of manufacturing, as recited in claim 3 , wherein further forming photo-resist on top of the hard mask prior to the performing a plurality of etching processes step.

5. The method of manufacturing, as recited in claim 4 , wherein the performing a plurality of etching processes step includes a first etching step, using the hard mask and photo-resist, to form an etched top electrode and an etched MTJ.

6. The method of manufacturing, as recited in claim 5 , further including forming a dielectric layer on top and around the MTJ and the top electrode and on top of the pinning layer.

7. The method of manufacturing, as recited in claim 6 , wherein the dielectric layer is made of silicon nitride.

8. The method of manufacturing, as recited in claim 6 , further including the step of chemical mechanical polishing to form a substantially flat surface on top of the dielectric layer.

9. The method of manufacturing, as recited in claim 8 , wherein the performing of a plurality of etching processes includes a second etching step to form an etched dielectric layer.

10. The method of manufacturing, as recited in claim 9 , further including forming a second photo-resist on top of the dielectric layer.

11. The method of manufacturing, as recited in claim 10 , wherein the performing step of claim 1 further includes a third etching step during which detecting the predetermined material in the pinning layer and thereafter stopping the third etching step.

12. The method of manufacturing, as recited in claim 11 , wherein the predetermined material is manganese.

13. The method of manufacturing, as recited in claim 11 , wherein forming the bottom electrode on top of a metal layer.

14. The method of manufacturing, as recited in claim 13 , wherein the metal layer being formed of copper.

15. The method of manufacturing, as recited in claim 14 , wherein preventing copper from being deposited onto the barrier layer of the MTJ during the performing step of claim 1 .

16. The method of manufacturing, as recited in claim 11 , wherein the dielectric material sufficiently surrounding the MTJ to prevent deposition of metal onto the barrier layer of the MTJ thereby preventing shorting during the performance of the plurality of etching processes.

17. The method of manufacturing, as recited in claim 1 , wherein the bottom electrode is made of tantalum (Ta) and tantalum nitride (TaN), or titanium nitride (TiN).