IP Library Granted Patent US 9,202,935
Granted Patent B2
US 9,202,935 · App. 14/043,431 · Granted Dec 1, 2015

Zener diode haviing a polysilicon layer for improved reverse surge capability and decreased leakage current

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Quick Facts
Patent No.
US 9,202,935
App. No.
14/043,431
Granted
Dec 1, 2015
Kind
B2
Abstract

A semiconductor device such as a Zener diode includes a first semiconductor material of a first conductivity type and a second semiconductor material of a second conductivity type in contact with the first semiconductor material to form a junction therebetween. A first oxide layer is disposed over a portion of the second semiconductor material such that a remaining portion of the second semiconductor material is exposed. A polysilicon layer is disposed on the exposed portion of the second semiconductor material and a portion of the first oxide layer. A first conductive layer is disposed on the polysilicon layer. A second conductive layer is disposed on a surface of the first semiconductor material opposing a surface of the first semiconductor material in contact with the second semiconductor material.

Claims (13)

1. A semiconductor device, comprising:

a first semiconductor material of a first conductivity type;

a second semiconductor material of a second conductivity type in contact with the first semiconductor material to form a junction therebetween;

a first oxide layer disposed over a portion of the second semiconductor material such that a remaining portion of the second semiconductor material is exposed;

a polysilicon layer disposed on and in contact with the exposed portion of the second semiconductor material and a portion of the first oxide layer;

a first conductive layer disposed on the polysilicon layer; and

a second conductive layer disposed on a surface of the first semiconductor material opposing a surface of the first semiconductor material in contact with the second semiconductor material.

2. The semiconductor device of claim 1 further comprising a second oxide layer disposed on the first oxide layer and a portion of the polysilicon layer.

3. The semiconductor device of claim 2 wherein the second oxide layer includes a low temperature oxide (LTO).

4. The semiconductor device of claim 1 further comprising a semiconductor substrate, the first semiconductor material being a first semiconductor layer disposed on or in the substrate.

5. The semiconductor device of claim 1 further comprising a semiconductor substrate that includes the first semiconductor material.

6. The semiconductor device of claim 1 wherein the polysilicon layer has a thickness between 1 and 4 microns.

7. The semiconductor device of claim 1 wherein the polysilicon layer has a thickness between 1 and 2 microns.

Assignments (2)
SECURITY INTEREST Recorded Jun 12, 2019
From: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY DALE ELECTRONICS, LLC; VISHAY-DALE, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY-SILICONIX, INC.; VISHAY-SILICONIX; VISHAY SPRAGUE, INC.; VISHAY EFI, INC.; SPRAGUE ELECTRIC COMPANY; VISHAY GENERAL SEMICONDUCTOR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 049440/0876 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 10, 2013
From: CHEN, SHIH-KUAN; CHIANG, WAN-LAN; CHIANG, MING-TAI; PENG, CHIH-PING; LIN, YIH-YIN
To: VISHAY GENERAL SEMICONDUCTOR LLC
Reel/Frame 031382/0542 →