Radio frequency isolation for SOI transistors
According to one example embodiment, a structure includes at least one SOI (semiconductor-on-insulator) transistor situated over a buried oxide layer, where the buried oxide layer overlies a bulk substrate. The structure further includes an electrically charged field control ring situated over the buried oxide layer and surrounding the at least one SOI transistor. A width of the electrically charged field control ring is greater than a thickness of the buried oxide layer. The electrically charged field control ring reduces a conductivity of a surface portion of the bulk substrate underlying the field control ring, thereby reducing RF coupling of the at least one SOI transistor through the bulk substrate. The structure further includes an isolation region situated between the electrically charged field control ring and the at least one SOI transistor. A method to achieve and implement the disclosed structure is also provided.
1. A structure comprising:
at least one SOI (semiconductor-on-insulator) transistor situated in a silicon layer over a buried oxide layer, said buried oxide layer having a thickness greater than a thickness of the silicon layer and overlying a bulk substrate, the at least one SOI transistor having a source and a drain in contact with the buried oxide layer; and
a field control ring formed in the silicon layer, above said buried oxide layer and surrounding said at least one SOI transistor, said field control ring coupled to a bias voltage of non-zero voltage to provide a charge to the field control ring to generate an electrical field that creates a resistive surface portion on said bulk substrate underlying said field control ring, wherein a width of said field control ring is greater than said thickness of said buried oxide layer by a factor of between 3.0 and about 10.0.
2. The structure of claim 1 further comprising an isolation region situated between said field control ring and said at least one SOI transistor.
3. The structure of claim 1 wherein said field control ring is doped with a dopant having a same conductivity type as said bulk substrate.
4. The structure of claim 1 wherein said field control ring includes silicon.
5. The structure of claim 1 wherein said field control ring includes a metal.
6. The structure of claim 1 wherein said field control ring includes a high resistivity conductive material.
7. The structure of claim 1 wherein the field control ring is in contact with the buried oxide layer.
8. The structure of claim 1 further comprising a ground reference voltage in communication with a side of the bulk substrate that is opposite a side of the bulk substrate proximal the buried oxide layer.
9. A structure comprising:
a plurality of SOI (semiconductor-on-insulator) transistors situated in a silicon layer over a buried oxide layer, said buried oxide layer having a thickness greater than a thickness of the silicon layer and overlying a bulk substrate, said plurality of SOI transistors being coupled in series; and
a field control ring formed in the silicon layer, above said buried oxide layer and surrounding said plurality of SOI transistors, said field control ring coupled to a bias voltage of non-zero voltage to provide a charge to the field control ring to generate an electrical field that creates a resistive surface portion on said bulk substrate underlying said field control ring wherein a width of said field control ring is greater than said thickness of said buried oxide layer by a factor of between 3.0 and about 10.0.
10. The structure of claim 9 further comprising an isolation region situated between said field control ring and said plurality of SOI transistors.
11. The structure of claim 9 wherein said field control ring is doped with a dopant having a same conductivity type as said bulk substrate.
12. The structure of claim 9 wherein said field control ring includes a conductive material selected from the group consisting of silicon and a metal.
13. The structure of claim 9 wherein said plurality of SOI transistors form an RF switch.
14. The structure of claim 9 wherein the field control ring is in contact with the buried oxide layer.
15. The structure of claim 9 wherein at least one of the plurality of SOI transistors has a source and drain in contact with the buried oxide layer.
16. The structure of claim 9 further comprising a ground reference voltage in communication with a side of the bulk substrate that is opposite a side of the bulk substrate proximal the buried oxide layer.
17. An electronic device comprising:
a bulk substrate;
a buried oxide layer overlying the bulk substrate;
a silicon layer over the buried oxide layer, the buried oxide layer having a thickness greater than a thickness of the silicon layer;
a radiofrequency (RF) switch including at least one silicon-on-insulator (SOI) transistor situated in the silicon layer, the SOI transistor having a source and a drain in contact with the buried oxide layer; and
a field control ring coupled to a bias voltage of non-zero voltage and formed in the silicon layer surrounding said at least one SOI transistor, the bias voltage providing a charge to the field control ring to generate an electric field that creates a resistive surface portion on said bulk substrate underlying said field control ring wherein a width of said field control ring is greater than said thickness of said buried oxide layer by a factor of between 3.0 and about 10.0.
18. The electronic device of claim 17 wherein the electronic device is a phone.
19. The electronic device of claim 17 further comprising an isolation region situated between said field control ring and said at least one SOI transistor.
20. The electronic device of claim 17 wherein the field control ring is in contact with the buried oxide layer.
21. The electronic device of claim 17 further comprising a ground reference voltage in communication with a side of the bulk substrate that is opposite a side of the bulk substrate proximal the buried oxide layer.