IP Library › Granted Patent US 9,331,658
Granted Patent B2
US 9,331,658 · App. 14/053,715 · Granted May 3, 2016

Filter circuit

Inventor: Tetsuo Taniguchi (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H03H7/00H03H7/1791H03H7/463H03H7/0115H03H7/1758H03H7/1775
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Quick Facts
Patent No.
US 9,331,658
App. No.
14/053,715
Granted
May 3, 2016
Kind
B2
Abstract

A filter circuit includes an antenna-side circuit, a transmission-side circuit, a reception-side circuit, and an external connection capacitor. The antenna-side circuit is connected to an antenna-side terminal. The transmission-side circuit is connected to a transmission-side terminal and the antenna-side circuit. The reception-side circuit is connected to a reception-side terminal, the antenna-side circuit, and ground. The external connection capacitor is connected between an external control terminal and a connection point between the antenna-side circuit and the reception-side circuit. The antenna-side circuit and the transmission-side circuit constitute a low pass filter. The antenna-side circuit and the reception-side circuit constitute a band pass filter. The reception-side circuit includes an LC parallel resonant circuit.

Claims (43)

1. A filter circuit comprising:

a first circuit connected to a first terminal;

a second circuit connected to a second terminal and the first circuit;

a third circuit connected to a third terminal, the first circuit, and ground;

an external connection capacitor including a first end connected directly to a connection point between the first and third circuits and a second end connected directly to an external control terminal; and

the external connection capacitor and the third circuit define an LC parallel resonator; wherein

the first and second circuits constitute a first filter circuit;

the first and third circuits constitute a second filter circuit;

the third circuit includes an LC parallel resonant circuit;

a first end of the LC parallel resonant circuit is connected to the connection point; and

a second end of the LC parallel resonant circuit is connected to ground.

2. The filter circuit according to claim 1 , wherein

when the first filter circuit is used, the external control terminal is grounded; and

when the second filter circuit is used, the external control terminal is opened.

3. The filter circuit according to claim 1 , wherein

the first circuit includes a capacitor; and

the capacitor is connected to the connection point.

4. The filter circuit according to claim 1 , wherein

the first filter circuit includes a low pass filter circuit; and

the second filter circuit includes a band pass filter circuit.

5. The filter circuit according to claim 1 , wherein

the third circuit is connected to a fourth terminal and includes first and second inductors;

the third and fourth terminals constitute a balanced terminal;

the first inductor constitutes the LC parallel resonant circuit;

the second inductor is electromagnetically coupled to the first inductor; and

the second inductor is connected between the third and fourth terminals.

6. The filter circuit according to claim 1 , wherein

the filter circuit includes a dielectric layer, an electrode layer, and a via electrode;

the dielectric layer and the electrode layer are laminated on each other;

the via electrode extends through the dielectric layer;

the filter circuit includes an inductor and a capacitor;

a plurality of the electrode layers are connected to each other via the via electrode to define the inductor; and

two of the electrode layers are opposed to each other with the dielectric layer interposed therebetween to define the capacitor.

7. The filter circuit according to claim 1 , further comprising a laminate having a rectangular or substantially rectangular parallelepiped shape.

8. The filter circuit according to claim 7 , further comprising outer electrodes disposed on at least one surface of the laminate.

9. The filter circuit according to claim 7 , wherein the laminate includes dielectric layers and electrode layers stacked on each other.

10. The filter circuit according to claim 9 , further comprising linear electrodes disposed on at least one of the dielectric layers.

11. The filter circuit according to claim 10 , wherein the linear electrodes are arranged in a loop shape or a substantially loop shape.

12. The filter circuit according to claim 9 , further comprising plate electrodes disposed on at least one of the dielectric layers.

13. The filter circuit according to claim 2 , wherein when the when the first filter circuit is used and the external control terminal is grounded, the filter circuit is a T-type low pass filter.

14. The filter circuit according to claim 9 , further comprising linear electrodes disposed on the dielectric layers and connected to each other through via electrodes.

15. The filter circuit according to claim 7 , wherein the laminate includes first and second groups of electrode layers disposed on opposing sides of the laminate so as not to overlap with each other.

16. The filter circuit according to claim 7 , further comprising linear electrodes on a first principal surface side of the laminate and flat plate electrodes located on a second principal surface side of the laminate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2014
From: TANIGUCHI, TETSUO
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 031925/0589 →
Priority Claims (1)
JP 2013-007217 · Jan 18, 2013 · national
Continuity (1)
Related Publication 20140203890A1 · Jul 24, 2014