IP Library Granted Patent US 9,000,967
Granted Patent B2
US 9,000,967 · App. 14/056,917 · Granted Apr 7, 2015

Apparatuses and methods for linear to discrete quantization conversion with reduced sampling variation errors

Inventor: Christopher Pagnanelli (Huntington Beach, CA)
Assignee: Syntropy Systems, LLC
H03M3/30H03M1/121H03M3/468
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,000,967
App. No.
14/056,917
Granted
Apr 7, 2015
Kind
B2
Abstract

Provided is an apparatus for converting a continuous-time, continuously variable signal into a sampled and quantized signal, which includes an input line for accepting an input signal, multiple processing branches coupled to the input line, and an adder coupled to outputs of the plurality of processing branches. Each of the processing branches includes a sampling/quantization circuit and a digital bandpass interpolation filter having an input coupled to an output of the sampling/quantization circuit. The digital bandpass interpolation filters in different ones of the processing branches have frequency responses that are centered at different frequencies. The digital bandpass interpolation filter in at least one of the processing branches includes: (i) a quadrature downconverter, (ii) a first lowpass filter and a second lowpass filter, (iii) a first interpolator and a second interpolator, each having an input for inputting a variable interpolant value, and (iv) a quadrature upconverter.

Claims (38)

1. An apparatus for converting a continuous-time, continuously variable signal into a sampled and quantized signal, comprising:

an input line for accepting an input signal that is continuous in time and continuously variable;

a plurality of processing branches coupled to the input line, each of said processing branches including: (a) a sampling/quantization circuit, and (b) a digital bandpass interpolation filter having an input coupled to an output of the sampling/quantization circuit; and

an adder coupled to outputs of the plurality of processing branches,

wherein the digital bandpass interpolation filters in different ones of the plurality of processing branches have frequency responses that are centered at different frequencies,

wherein the digital bandpass interpolation filter in at least one of said processing branches comprises: (i) a quadrature downconverter, (ii) a first lowpass filter and a second lowpass filter, (iii) a first interpolator and a second interpolator, each having an input for inputting a variable interpolant value, and (iv) a quadrature upconverter, and

wherein input samples and output samples of said digital bandpass interpolation filter in at least one of said processing branches are different discrete-time representations of an underlying continuous-time signal, with the output samples representing an altered sampling period, as compared to the input samples, and with the sampling period being altered by an amount that depends on the variable interpolant value.

2. An apparatus according to claim 1 , wherein at least two of the processing branches share a common sampling/quantization circuit, such that the output of the common sampling/quantization circuit is coupled to the input of the bandpass interpolation filter in each of said at least two of the processing branches.

3. An apparatus according to claim 1 , further comprising:

a sampling error estimator having an output coupled to at least one of the bandpass interpolation filters, and

wherein the output of the sampling error estimator has a value which is based on fluctuations in a nominal oscillation period of a signal provided to an input of the sampling error estimator.

4. An apparatus according to claim 3 , further comprising a second sampling error estimator coupled to a different one of the bandpass interpolation filters.

5. An apparatus according to claim 3 , further comprising a lowpass prototype filter that replicates at the output of the sampling error estimator, at least one of an equivalent baseband delay or an equivalent baseband amplitude response of at least one of the bandpass interpolation filters.

6. An apparatus according to claim 3 , wherein gain and DC offsets of the sampling error estimator are corrected by minimizing at least one of a mean absolute value or a variance of a residual quantization noise at the output of at least one of the processing branches.

7. An apparatus according to claim 1 , further comprising:

a resampling data buffer coupled to a least one of the bandpass interpolation filters,

wherein the resampling data buffer receives data samples at time intervals that are different from the time intervals at which the resampling data buffer delivers data samples.

8. An apparatus according to claim 7 , wherein rates at which the sampling/quantization circuits operate are greater than an overall output data rate of said apparatus, and wherein the digital bandpass interpolation filters and associated resampling data buffers reduce said rates to the overall output data rate of said apparatus.

9. An apparatus according to claim 7 , wherein there are at least 4 times as many processing branches as resampling data buffers.

10. An apparatus according to claim 1 , further comprising:

a rotation matrix multiplier coupled to an output of one of: (i) the quadrature downconverter, (ii) the first and second lowpass filter, or (iii) the first and second interpolator,

wherein the rotation matrix multiplier applies a phase rotation to complex-valued data samples that is based on the variable interpolant value.

11. An apparatus according to claim 1 , wherein the variable interpolant value is generated using an accumulator.

12. An apparatus according to claim 1 , wherein the variable interpolant value is generated using an integrator.

13. An apparatus according to claim 1 , wherein there are a total of M processing branches, and wherein M is at least 8.

14. An apparatus according to claim 1 , wherein each of the processing branches also includes an analog bandpass filter.

15. An apparatus according to claim 1 , wherein an interpolation operation performed by at least one of the bandpass interpolation filters is based on a second-order function.

16. An apparatus according to claim 1 , wherein an interpolation operation performed by at least one of the bandpass interpolation filters is based on a first-order function.

17. An apparatus according to claim 1 , wherein the digital bandpass interpolation filter in each of a plurality of said processing branches introduces total distortion power which is at least 40 dB below a level of a signal output by said digital bandpass interpolation filter.

18. An apparatus according to claim 1 , wherein sine and cosine sequences are used by the quadrature downconverter and the quadrature upconverter and are generated using a direct digital synthesis method that comprises digital accumulators and phase lookup tables.

19. An apparatus according to claim 1 , wherein sine and cosine sequences are used by the quadrature downconverter and the quadrature upconverter and are generated using recursive operations.

20. An apparatus according to claim 1 , wherein sine and cosine sequences are used by the quadrature downconverter and the quadrature upconverter, and wherein at least one of said sine and cosine sequences is adjustable in at least one of amplitude or phase.

21. An apparatus according to claim 20 , wherein the variable interpolant value determines adjustment of the phase of the sine and cosine sequences used by at least one of the quadrature downconverter or the quadrature upconverter.

22. An apparatus according to claim 1 , wherein at least one of the first lowpass filter and the second lowpass filter incorporates a recursive moving-average operation.

23. An apparatus according to claim 1 , wherein the digital bandpass interpolation filter in at least one of said processing branches incorporates an equalizer having at least one complex tap.

24. An apparatus according to claim 23 , wherein the equalizer has plural complex taps.

25. An apparatus according to claim 1 , wherein the center frequencies of the plurality of digital bandpass interpolation filters are spaced at equal frequency intervals.

26. An apparatus according to claim 1 , wherein the center frequencies of the plurality of digital bandpass interpolation filters are spaced at non-equal frequency intervals.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2021
From: PAGNANELLI, CHRISTOPHER; SYNTROPY SYSTEMS, LLC
To: PAGNANELLI FAMILY TRUST
Reel/Frame 057998/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2021
From: SYNTROPY SYSTEMS, LLC
To: PAGNANELLI, CHRISTOPHER
Reel/Frame 055928/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2013
From: PAGNANELLI, CHRISTOPHER
To: SYNTROPY SYSTEMS, LLC
Reel/Frame 031429/0691 →
Continuity (6)
Continuation In Part 13535037 · Jun 27, 2012
Provisional Application 61549739 · Oct 20, 2011
Provisional Application 61536003 · Sep 18, 2011
Provisional Application 61554918 · Nov 2, 2011
Provisional Application 61501284 · Jun 27, 2011
Related Publication 20140043177A1 · Feb 13, 2014