Self aligned trench MOSFET with integrated diode
Transistor devices can be fabricated with an integrated diode using a self-alignment. The device includes a doped semiconductor substrate having one or more electrically insulated gate electrodes formed in trenches in the substrate. One or more body regions are formed in a top portion of the substrate proximate each gate trench. One or more source regions are formed in a self-aligned fashion in a top portion of the body regions proximate each gate trench. One or more thick insulator portions are formed over the gate electrodes on a top surface of the substrate with spaces between adjacent thick insulator portions. A metal is formed on top of the substrate over the thick insulator portions. The metal forms a self-aligned contact to the substrate through the spaces between the thick insulator portions. An integrated diode is formed under the self-aligned contact.
1. A method for fabricating a semiconductor device, comprising:
forming a sacrificial structure having gaps on a semiconductor substrate;
forming one or more spacers at sidewalls at said gaps of the sacrificial structure, wherein the one or more spacers are entirely formed above a topmost surface of the semiconductor substrate;
forming trenches into the semiconductor substrate between the spacers;
forming gate electrodes in the trenches that are insulated from the semiconductor substrate by gate insulator, wherein tops of the gate electrodes are recessed from a surface of the semiconductor substrate;
filling remaining portions of the trenches with thick insulator to at least a top of the sacrificial structure, wherein the one or more spacers are not removed before the thick insulator is formed;
removing the sacrificial structure leaving the thick insulator on top of the gate electrodes; and
forming contacts to the substrate in the area formerly covered by the sacrificial structure whereby the contacts are self-aligned to the gate trenches by the thick insulator covering the tops of the gate electrodes.
2. The method of claim 1 , further comprising etching said contacts into the semiconductor substrate wherein the contacts are trenched contacts.
3. The method of claim 1 , further comprising forming Schottky diodes under the contacts.
4. The method of claim 1 further comprising low injection efficiency P-N junction diodes under the contacts.
5. The method of claim 1 , wherein there is no etching into the semiconductor substrate before said forming the spacers.
6. The method of claim 1 , wherein the semiconductor substrate is made from an N-type or P-type semiconductor material.
7. The method of claim 1 , wherein the sacrificial structure having gaps acts as an implant mask for body and source implants.
8. The method of claim 1 , wherein the sacrificial structure have a number of layers including a nitride layer.
9. The method of claim 1 , wherein the one or more spacers are made of oxide or nitride.
10. The method of claim 1 , wherein forming body and source regions before forming the one or more spacers.