Magnetic random access memory journal
A flash memory system comprises a logic block interface operable to receive a write command to store data from a host computer, a flash memory device operable to store the data in response to the write command, and a non-volatile memory communicatively coupled to the flash memory device and the logic block interface operable to temporarily store the data, and to provide the stored data to be written to the flash memory device in the event of a disruption during execution of the write command.
1. A flash memory system comprising:
a logic block interface operable to receive a write command to store data at a specified address location from a host computer;
a flash memory device communicatively coupled to the logic block interface operable to store the data at the specified address location in response to the write command; and
a non-volatile memory communicatively coupled to the flash memory device and the logic block interface operable to temporarily store the data and the specified address location, and to provide the data and the specified address location to the logic block interface to be written to the flash memory device after recovering from a disruption that occurs during execution of the write command.
2. The flash memory system of claim 1 , wherein the non-volatile memory comprises MRAM technology.
3. The flash memory system of claim 1 , wherein the non-volatile memory is operable to provide the data and the specified address location to the logic block interface to be written to the flash memory device after recovering from a power loss during the execution of the write command.
4. The flash memory system of claim 1 , wherein the non-volatile memory is operable to provide the data and the specified address location to the logic block interface to be written to the flash memory device after recovering from a write error during the execution of the write command.
5. The flash memory system of claim 1 , wherein the non-volatile memory comprises a journal.
6. The flash memory system of claim 1 , further comprising a buffer coupled to the logic block interface adapted to receive and buffer the data to be written to the flash memory device from the host computer.
7. The flash memory system of claim 1 , wherein the logic block interface further comprises a Flash Translation Layer module adapted to providing translation between logical addresses provided by the host computer and physical addresses in the flash memory device.
8. A method comprising:
receiving, from a host computer, a write command to store data at a specified address in a flash memory device;
storing the data and the specified address in a non-volatile memory;
performing a write operation to the flash memory device in response to the write command;
in the absence of a write completion signal indicating of a disruption to the write operation to the flash memory device:
reading the data and the specified address from the non-volatile memory;
verifying the validity of the data; and
writing the verified data from the non-volatile memory to the specified address in the flash memory device.
9. The method of claim 8 , wherein reading the data from the non-volatile memory comprises reading the data and the specified address from the non-volatile memory in the event of a power loss during the write operation.
10. The method of claim 8 , wherein reading the data from the non-volatile memory comprises reading the data and the specified address from the non-volatile memory in the event of a write error during the write operation.
11. The method of claim 8 , wherein storing the data in a non-volatile memory comprises storing the data in an MRAM device.
12. The method of claim 8 , wherein verifying the data from the non-volatile memory comprises verifying the CRC of the data.
13. The method of claim 8 , further comprising buffering the data in a RAM buffer in response to receiving the write command.
14. The method of claim 8 , further comprising translating a logical address specified in the write command to a physical address and storing the addresses in a logical block interface.
15. The method of claim 14 , further comprising fetching the physical address from the logical block interface prior to writing the verified data to the flash memory device.
16. A non-transitory computer readable medium having encoded thereon a method comprising:
receiving, from a host computer, a write command to store data at a specified address in a flash memory device;
storing the data and the specified address in a non-volatile memory;
performing a write operation to the flash memory device in response to the write command;
in the event of an interrupted write operation to the flash memory device:
reading the stored data and the specified address from the non-volatile memory;
verifying the validity of the data; and
writing the verified data from the non-volatile memory to the specified address in the flash memory device.
17. The non-transitory computer readable medium having encoded thereon a method of claim 16 , wherein verifying the data from the non-volatile memory comprises verifying the CRC of the data.
18. The non-transitory computer readable medium having encoded thereon a method of claim 16 , further comprising buffering the data in a RAM buffer in response to receiving the write command.
19. The non-transitory computer readable medium having encoded thereon a method of claim 16 , further comprising translating a logical address specified in the write command to a physical address and storing the addresses in a logical block interface.
20. The non-transitory computer readable medium having encoded thereon a method of claim 19 , further comprising fetching the physical address from the logical block interface prior to writing the valid data to the flash memory device.