IP Library Granted Patent US 9,332,649
Granted Patent B2
US 9,332,649 · App. 14/066,905 · Granted May 3, 2016

Flexible printed circuit board for packaging semiconductor device and method of producing the same

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Quick Facts
Patent No.
US 9,332,649
App. No.
14/066,905
Granted
May 3, 2016
Kind
B2
Abstract

A flexible circuit board, a semiconductor package, and methods of forming the same are provided. The flexible circuit board includes: a base film; an input line pattern, an output line pattern, and a dummy pattern on a first surface of the base film; and a ground pattern on a second surface of the base film and electrically connected with the dummy pattern.

Claims (29)

1. A flexible circuit board, comprising:

a base film;

a plurality of input line patterns, a plurality of output line patterns, and a plurality of dummy patterns on a first surface of the base film; and

a ground pattern on a second surface of the base film and electrically connected with one of the plurality of dummy patterns, wherein the plurality of dummy patterns are formed between each of the plurality of input line patterns or between each of the plurality of output line patterns.

2. The flexible circuit board of claim 1 , wherein the base film includes a hole, and the ground pattern is electrically connected with the one of the plurality of dummy patterns through the hole.

3. The flexible circuit board of claim 1 , wherein the plurality of dummy patterns are connected with an adjacent dummy pattern.

4. The flexible circuit board of claim 1 , wherein the plurality of dummy patterns are is formed in a polygonal shape, a circle shape or an oval shape.

5. The flexible circuit board of claim 1 , wherein the plurality of input line patterns, the plurality of output line patterns, and the plurality of dummy patterns and the ground pattern comprise a conductive material.

6. The flexible circuit board of claim 1 , wherein the base film includes a plurality of holes formed therein, and one of the plurality of dummy patterns electrically connected with the ground pattern through the plurality of holes.

7. The flexible circuit board of claim 6 , wherein the hole is filled with a conductive material to electrically connect one of the plurality of dummy patterns with the ground pattern.

8. A semiconductor package, comprising:

a base film;

a plurality of input line patterns, a plurality of output line patterns, and a plurality of dummy patterns on a first surface of the base film;

a ground pattern on a second surface of the base film and electrically connected with the one of the plurality of dummy patterns; and

a display device mounted on the base film and connected with one of the plurality of input line patterns and one of the plurality of output line patterns, wherein the plurality of dummy patterns are formed between each of the plurality of input line patterns or between each of the plurality of output line patterns.

9. The semiconductor package of claim 8 , wherein the base film includes a hole, and the ground pattern is electrically connected with one of the plurality of dummy patterns through the hole.

10. The semiconductor package of claim 8 , wherein the display device is electrically connected with one of the plurality of dummy patterns.

11. The semiconductor package of claim 8 , wherein the display device is electrically insulated from the plurality of dummy patterns.

12. A flexible circuit board comprising:

a base film comprising an inner lead region where a display device is mounted and an outer lead region bonded with an external device;

a plurality of input line patterns and a plurality of output line patterns on a first surface of the base film;

at least one dummy pattern on the first surface of the base film; and

a ground pattern on a second surface of the base film and connected with the dummy pattern through a hole provided in the base film, the at least one dummy pattern being configured to channel noise to the ground pattern, wherein the at least one dummy pattern is formed between each of the plurality of input line patterns or between each of the plurality of output line patterns.

13. A semiconductor package comprising:

a base film comprising an inner lead region where a display device is mounted and an outer lead region bonded with an external device;

a plurality of input line patterns and a plurality of output line patterns on a first surface of the base film;

at least one dummy pattern on the first surface of the base film;

a ground pattern on a second surface of the base film and connected with the dummy pattern through a hole provided in the base film, the at least one dummy pattern being configured to channel noise to the ground pattern; and

a display device mounted on the inner lead region of the base film and connected with one of the plurality of input line patterns and one of the plurality of output line patterns, wherein the at least one dummy patterns is formed between each of the plurality of input line patterns or between each of the plurality of output line patterns.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2025
From: MAGNACHIP MIXED-SIGNAL, LTD.
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 071813/0800 →
NUNC PRO TUNC ASSIGNMENT Recorded Mar 14, 2024
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: MAGNACHIP MIXED-SIGNAL, LTD.
Reel/Frame 066878/0875 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2013
From: KIM, DOYOUNG; KIM, KYUNGDUK
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 031508/0732 →