Granted Patent B2

US 8,907,351 · App. 14/068,941 · Granted Dec 9, 2014

Abstract

Claims (35)

1. A silicon carbide (SiC) bipolar junction transistor (BJT), comprising:

a collector region;

a base region having an extrinsic part;

an emitter region;

a surface passivation layer deposited on the extrinsic part between an emitter contact contacting the emitter region and a base contact contacting the base region; and

a surface gate at the surface passivation layer, the surface gate having at least a portion disposed over the extrinsic part of the base region.

2. The SiC BJT of claim 1 , wherein the surface passivation layer is disposed between the base contact and at least one of a sidewall of the emitter region or a sidewall of a base-emitter junction formed by the base region and the emitter region.

3. The SiC BJT of claim 1 , wherein the surface passivation layer is disposed on the surface of the BJT between the emitter contact and the base contact.

4. The SiC BJT of claim 1 , wherein the surface passivation layer extends from the emitter contact towards the base contact.

5. The SiC BJT of claim 1 , wherein the surface passivation layer includes a dielectric material.

6. The SiC BJT of claim 1 , wherein the surface passivation layer is a plasma enhanced chemical vapor deposited layer of silicon dioxide.

7. The SiC BJT of claim 1 , wherein the surface gate includes a conductive material.

8. The SiC BJT of claim 1 , wherein the surface gate includes at least one of a metal or doped poly-silicon.

9. The SiC BJT of claim 1 , wherein the surface gate is electrically connected to the emitter contact.

10. The SiC BJT of claim 1 , wherein the surface gate is configured to apply a negative electric potential to the surface passivation layer with respect to an electric potential in the base region.

11. The SiC BJT of claim 1 , wherein the emitter region and the collector region includes n-type SiC and the base region includes p-type SiC.

12. A device, comprising:

a first region of n-type silicon carbide (SiC);

a second region of p-type SiC disposed on the first region;

a third region of n-type SiC disposed on the second region, the third region and a part of the second region defining a mesa;

a dielectric layer deposited on the mesa between a first contact contacting the second region and a second contact contacting the third region; and

an electrode disposed on the dielectric layer and having a portion disposed between a sidewall of the mesa and the first contact.

13. The device of claim 12 , wherein the dielectric layer includes deposited silicon dioxide.

14. The device of claim 12 , wherein the electrode includes a conductive material.

15. The device of claim 12 , wherein the dielectric layer has a thickness which is less than a thickness of either one of the first contact or the second contact.

16. The device of claim 12 , wherein the dielectric layer is disposed on the second region between the sidewall of the mesa and the first contact.

17. The device of claim 12 , wherein the electrode is electrically connected to the second contact.

18. A silicon carbide (SiC) bipolar junction transistor (BJT), comprising:

a collector region;

a base region;

an emitter region defining an elevated structure having a sidewall;

a surface passivation layer deposited between an emitter contact contacting the emitter region and a base contact contacting the base region; and

a surface gate at the surface passivation layer and separated from the base contact by a first gap, the surface gate being separated from the sidewall of the elevated structure of the emitter region by a second gap.

19. The SiC BJT of claim 18 , wherein the surface gate is separated from a sidewall defined by the surface passivation layer.

20. The SiC BJT of claim 18 , wherein the base region has an extrinsic part, the surface passivation layer is deposited on the extrinsic part.

Assignments (9)