Granted Patent B2

US 9,368,963 · App. 14/072,122 · Granted Jun 14, 2016

Abstract

Claims (22)

1. An ESD protection circuit comprising a series connection of at least two semiconductor components between a signal line to be protected and a return line, comprising a first protection component connected to the signal line and a second protection component connected to the return line in series with the first protection component, and a bias voltage source which connects to the junction between the two protection components through a bias impedance;

wherein the first protection component is connected in a forward conduction direction between the signal line and the return line, and the second protection component is connected in a reverse conduction direction between the signal line and the return line;

a first series connection of at least two protection components between the signal line and the return line, comprising the first protection component and the second protection component, and the bias voltage source which connects to the junction between the first and second protection components through the bias impedance; and

a second series connection of at least two protection components between the signal line and the return line, comprising a third protection component and a fourth protection component in series with opposite polarity, and a second bias voltage source which connects to the junction between the third and fourth protection components through a second bias impedance;

wherein the third protection component is connected in a reverse conduction direction between the signal line and the return line, and the fourth protection component is connected in a forward conduction direction between the signal line and the return line;

wherein the first bias voltage source connects to the junction between the first and second protection components through a first noise blocking diode in series, and the second bias voltage source connects to the junction between the third and fourth protection components through a second noise blocking diode in series; and

wherein the first bias voltage source is positive and the second bias voltage source is negative, and the first voltage source is on the anode side of the first noise blocking diode and the second voltage source is on the cathode side of the second noise blocking diode.

2. A circuit as claimed in claim 1 , wherein the capacitance of the first protection component is less than the capacitance of the second protection component.

3. A circuit as claimed in claim 1 , wherein the first protection component and the second protection component are back to back diodes connected at their cathodes, and the third protection component and the fourth protection component are back to back diodes connected at their anodes.

4. A circuit as claimed in claim 1 , wherein the second protection component and the fourth protection component comprise diodes with a breakdown voltage greater than 20V where at least one of these diodes conducts in reverse direction during a protection event.

5. A circuit as claimed in claim 1 , wherein the first protection component and the second protection component are each diodes, with the anode of the first protection component connected to the signal line and the anode of the second protection component connected to the return line where at least one of these diodes conducts in reverse direction during a protection event.

6. A circuit as claimed in claim 1 , wherein the circuit is formed as a single package.

7. A circuit as claimed in claim 1 , further comprising a power sensor for measuring a power level on the signal line.

8. An RF antenna circuit comprising an antenna and a circuit as claimed in claim 1 , wherein the signal line comprises the antenna feed.

9. An RF antenna circuit as claimed in claim 8 , comprising a GSM antenna circuit.

10. An RF antenna circuit as claimed in claim 8 , wherein the ESD protection circuit comprises a power sensor for measuring a power level on the signal line, wherein the antenna circuit comprises an impedance matching circuit which receives as input the power sensor signal.

11. An ESD protection circuit comprising a series connection of at least two semiconductor components between a signal line to be protected and a return line, comprising a first protection component connected to the signal line and a second protection component connected to the return line in series with the first protection component, and a bias voltage source which connects to the junction between the two protection components through a bias impedance;

wherein the first protection component is connected in a forward conduction direction between the signal line and the return line, and the second protection component is connected in a reverse conduction direction between the signal line and the return line;

a first series connection of at least two protection components between the signal line and the return line, comprising the first protection component and the second protection component, and the bias voltage source which connects to the junction between the first and second protection components through the bias impedance; and

a second series connection of at least two protection components between the signal line and the return line, comprising a third protection component and a fourth protection component in series with opposite polarity, and a second bias voltage source which connects to the junction between the third and fourth protection components through a second bias impedance;

wherein the third protection component is connected in a reverse conduction direction between the signal line and the return line, and the fourth protection component is connected in a forward conduction direction between the signal line and the return line;

wherein the first protection component and the second protection component are back to back diodes connected at their cathodes, and the third protection component and the fourth protection component are back to back diodes connected at their anodes.

Assignments (12)