IP Library Granted Patent US 9,093,567
Granted Patent B2
US 9,093,567 · App. 14/072,151 · Granted Jul 28, 2015

Diodes with multiple junctions and fabrication methods therefor

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Quick Facts
Patent No.
US 9,093,567
App. No.
14/072,151
Granted
Jul 28, 2015
Kind
B2
Abstract

An embodiment of a diode includes a semiconductor substrate, a first contact region having a first conductivity type, a second contact region laterally spaced from the first contact region, and having a second conductivity type, an intermediate region disposed in the semiconductor substrate between the first and second contact regions, electrically connected with the first contact region, and having the first conductivity type, and a buried region disposed in the semiconductor substrate, having the second conductivity type, and electrically connected with the second contact region. The buried region extends laterally across the first contact region and the intermediate region to establish first and second junctions, respectively. The first junction has a lower breakdown voltage than the second junction.

Claims (34)

1. A diode comprising:

a semiconductor substrate having a surface;

a first contact region disposed at the surface of the semiconductor substrate and having a first conductivity type;

a second contact region disposed at the surface of the semiconductor substrate, laterally spaced from the first contact region, and having a second conductivity type;

an intermediate region disposed in the semiconductor substrate between the first and second contact regions, electrically connected with the first contact region, and having the first conductivity type; and

a buried region disposed in the semiconductor substrate, having the second conductivity type, and electrically connected with the second contact region;

wherein the buried region extends laterally across the first contact region and the intermediate region to establish first and second junctions, respectively; and

wherein the first junction has a lower breakdown voltage than the second junction.

2. The diode of claim 1 , further comprising a further buried region disposed in the semiconductor substrate, having the second conductivity type, and electrically connected with the second contact region, wherein:

the further buried region is disposed adjacent the first contact region to establish a third junction; and

the third junction has a lower breakdown voltage than the first and second junctions.

3. The diode of claim 2 , wherein the further buried region is laterally spaced from the intermediate region such that the first and second junctions are disposed between the third junction and the second contact region.

4. The diode of claim 2 , wherein the buried region and the further buried region have dopant concentration levels on a same order of magnitude.

5. The diode of claim 2 , wherein the further buried region is disposed on the buried region between the first contact region and the buried region.

6. The diode of claim 1 , wherein the intermediate region and the second contact region are configured as respective rings that surround the first contact region.

7. The diode of claim 1 , further comprising a ring-shaped well region in the semiconductor substrate, electrically connected with the buried region, and having the second conductivity type, wherein:

the second contact region is disposed in the ring-shaped well region; and

the ring-shaped well region has a higher dopant concentration level than the buried region.

8. The diode of claim 1 , further comprising a silicide block supported by the semiconductor substrate and disposed over the intermediate region.

9. A diode comprising:

a semiconductor substrate having a surface;

a first contact region disposed at the surface of the semiconductor substrate and having a first conductivity type;

a second contact region disposed at the surface of the semiconductor substrate, laterally spaced from the first contact region, and having a second conductivity type;

an intermediate region disposed in the semiconductor substrate between the first and second contact regions, electrically connected with the first contact region, and having the first conductivity type; and

a buried region disposed in the semiconductor substrate, having the second conductivity type, and electrically connected with the second contact region;

wherein the buried region extends laterally from the second contact region to the first contact region and across the intermediate region to establish first and second junctions with the first contact region and the intermediate region, respectively; and

wherein the first junction has a lower breakdown voltage than the second junction.

10. The diode of claim 9 , further comprising a further buried region disposed in the semiconductor substrate, having the second conductivity type, and electrically connected with the second contact region, wherein:

the further buried region is disposed adjacent the first contact region to establish a third junction;

the third junction has a lower breakdown voltage than the first and second junctions.

11. The diode of claim 10 , wherein the further buried region is laterally spaced from the intermediate region such that the first and second junctions are disposed between the third junction and the second contact region.

12. The diode of claim 10 , wherein the further buried region is disposed on the buried region between the first contact region and the buried region.

13. The diode of claim 9 , wherein the intermediate region and the second contact region are configured as respective rings that surround the first contact region.

14. The diode of claim 9 , further comprising a silicide block supported by the semiconductor substrate and disposed over the intermediate region.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
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MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE FILING AND REMOVE APPL. NO. 14085520 REPLACE IT WITH 14086520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Mar 1, 2016
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