Chip tester and test method of semiconductor device

1. A chip tester for testing a semiconductor memory device, the semiconductor memory device including guarantee blocks, normal blocks, redundancy blocks, and a meta block in which repair information required to allocate the redundancy blocks for at least one first defective block generated in the normal blocks, the chip tester comprising:

a test unit suitable for performing a test on the guarantee blocks and for detecting at least one second defective block from the guarantee blocks;

a storage unit suitable for storing the repair information;

a determination unit suitable for comparing the number of available redundancy blocks, which are not allocated for the first defective blocks, with the number of the second defective block, by referring to the repair information; and

a guarantee block management unit suitable for updating the repair information to cancel allocation of at least one of the redundancy blocks based on the comparison result.

2. The chip tester according to claim 1 , wherein the determination unit cancels the allocation of the at least one of the redundancy blocks so that the number of the available redundancy blocks becomes greater than or equal to the number of the second defective block.

3. The chip tester according to claim 2 , wherein the guarantee block management unit updates the repair information so that the available redundancy blocks are allocated for the second defective block.

4. The chip tester according to claim 1 , wherein the guarantee block management unit updates the repair information to cancel the allocation of the at least one of the redundancy blocks when the number of the available redundancy blocks is less than the number of the second defective block.

5. The chip tester according to claim 1 , wherein the guarantee block management unit updates the repair information so that the available redundancy blocks are allocated for the second defective block when the number of the available redundancy blocks is greater than or equal to the number of the second defective block.

6. The chip tester according to claim 1 , wherein the test unit detects the second defective block and stores guarantee block information in the storage unit.

7. The chip tester according to claim 6 , wherein the determination unit recognizes the number of the second defective blocks based on the guarantee block information and recognizes the number of the available redundancy blocks based on the repair information.

8. The chip tester according to claim 6 , wherein the determination unit refers to the guarantee block information and performs the comparison operation when the second defective block is present.

9. A method of testing a semiconductor memory device, the semiconductor memory device including guarantee blocks, normal blocks, and redundancy blocks, the method comprising:

detecting at least one first defective block from the normal blocks and allocating the redundancy blocks for the first defective block;

detecting at least one second defective block from the guarantee blocks;

determining whether the number of the second defective block is greater than the number of available redundancy blocks, which are not allocated for the first defective block; and

re-allocating the available redundancy blocks for the second defective block based on the determination result.

10. The method according to claim 9 , further comprising:

canceling allocation of at least one of the redundancy blocks based on the determination result, before the re-allocating of the available redundancy blocks.

11. The method according to claim 10 , wherein the semiconductor memory device further includes a meta block, and

the method further comprising:

generating repair information based on a result of the allocation of the redundancy blocks for the first defective block, and storing the repair information in the meta block.

12. The method of claim 10 , wherein, after the canceling of the allocation of the redundancy blocks, the number of the available redundancy blocks becomes greater than or equal to the number of the second defective block.