Semiconductor device having low dielectric insulating film and manufacturing method of the same

1. A method of manufacturing a semiconductor device, the method comprising:

preparing a semiconductor wafer on an upper surface of which a low dielectric film wiring line laminated structure portion is formed, the low dielectric film wiring line laminated structure portion including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower, and a passivation film made of an inorganic material being formed on the low dielectric film wiring line laminated structure portion;

removing parts of the low dielectric film wiring line laminated structure portion in regions of dicing streets and regions on opposite sides of each of the dicing streets by applying laser beams, thereby forming grooves which expose side surfaces of the low dielectric film wiring line laminated structure portion;

forming a first organic resin film covering the side surfaces of the low dielectric film wiring line laminated structure portion; and

cutting the semiconductor wafer along the dicing streets, thereby obtaining a plurality of semiconductor devices.

2. The method according to claim 1 , wherein forming the grooves includes forming a water soluble protective film entirely covering the upper surface of the semiconductor wafer before forming the grooves, and removing the water soluble protective film after forming the grooves.

3. The method according to claim 2 , further comprising forming an electrode for external connection over the low dielectric film wiring line laminated structure portion.

4. The method according to claim 2 , wherein forming the first organic resin film includes forming an insulating film made of an organic resin covering at least a part of an upper side and exposed side surfaces of the passivation film and the exposed side surfaces of the low dielectric film wiring line laminated structure portion.

5. The method for manufacturing a semiconductor device according to claim 2 , further comprising:

forming a second organic resin film on an upper side of the passivation film;

wherein forming the first organic resin film includes forming an insulating film made of an organic resin covering at least a part of an upper side and exposed side surfaces of the second organic resin film, and the exposed side surfaces of the low dielectric film wiring line laminated structure portion.

6. The method according to claim 1 , further comprising forming a bump electrode for external connection over the low dielectric film wiring line laminated structure portion.

7. The method according to claim 6 , wherein forming the first organic resin film includes forming an insulating film made of an organic resin covering at least a part of an upper side and exposed side surfaces of the passivation film and the exposed side surfaces of the low dielectric film wiring line laminated structure portion.

8. The method according to claim 6 , further comprising:

forming a second organic resin film on the passivation film;

wherein forming the first organic resin film includes forming an insulating film made of an organic resin covering at least a part of an upper side and exposed side surfaces of the second organic resin film, and the exposed side surfaces of the low dielectric film wiring line laminated structure portion.

9. The method according to claim 6 , wherein preparing the semiconductor wafer includes patterning the passivation film.

10. The method according to claim 8 , wherein forming the second organic resin film includes patterning the second organic resin film to prevent the second organic resin film from extending in the dicing streets.

11. The method according to claim 8 , wherein forming the grooves includes removing parts of the second organic resin film and the low dielectric film wiring line laminated structure portion in the regions of the dicing streets and the regions on the opposite sides of each of the dicing streets by applying the laser beams, such that the grooves expose side surfaces of the second organic resin film and the side surfaces of the low dielectric film wiring line laminated structure portion.

12. The method according to claim 7 , wherein:

preparing the semiconductor wafer includes preparing the low dielectric film wiring line laminated structure portion on which the passivation film and a lower passivation film made of an inorganic material are formed, the lower passivation film being formed under the passivation film; and

forming the first organic resin film includes forming the insulating film made of the organic resin covering the exposed side surfaces of the passivation film, exposed side surfaces of the lower passivation film, and the side surfaces of the low dielectric film wiring line laminated structure portion.

13. The method according to claim 10 , wherein forming the second organic resin film includes forming the second organic resin film on the passivation film and patterning the second organic resin film such that side surfaces of the second organic resin film are located inward from the side surfaces of the low dielectric film wiring line laminated structure portion.

14. The method according to claim 6 , further comprising forming a third organic resin film covering an upper surface of the first organic resin film at least around the bump electrode for external connection.

15. The method according to claim 1 , wherein forming the first organic resin film includes forming an insulating film made of an organic resin which is filled in the grooves and from which a part corresponding to a central portion of each of the grooves is removed by one of (i) patterning the first organic resin film to prevent the first organic resin film from extending above the dicing street and (ii) cutting the first organic resin film along the dicing streets.

16. The method according to claim 14 , wherein:

forming the first organic resin film includes:

forming an insulating film made of an organic resin which is filled in the grooves and from which a part corresponding to a central portion of each of the grooves is removed; and

forming the third organic resin film includes:

filling the removed part of the first organic resin film with the organic resin; and

covering the side surfaces of the first organic resin film with the third organic resin film.

17. The method according to claim 8 , further comprising:

forming a connecting pad portion for an electrode on the second organic resin film so as to be connected to a connection pad portion of an uppermost wiring line of the low dielectric film wiring line laminated structure portion; and

forming a bump electrode for external connection on the connecting pad portion for the electrode;

wherein forming the first organic resin film includes forming an insulating film made of an organic resin covering an upper surface of the second organic resin film at least around the bump electrode for external connection, side surfaces of the second organic resin film, and the side surfaces of the low dielectric film wiring line laminated structure portion.

18. The method according to claim 6 , further comprising:

forming a connecting pad portion for an electrode on the first organic resin film so as to be connected to a connection pad portion of an uppermost wiring line of the low dielectric film wiring line laminated structure portion;

forming a bump electrode for external connection on the connecting pad portion for the electrode; and

forming a third organic resin film covering an upper surface of the first organic resin film at least around the bump electrode for external connection.

19. The method according to claim 1 , wherein the low dielectric film includes one of a polysiloxane-based material having an Si—O bond and an S—H bond, a polysiloxane-based material having an Si—O bond and an Si—CH 3 bond, a carbon-doped silicon oxide and an organic polymer-based low-k material, or a porous type of one of a fluorine-doped silicon oxide, boron-doped silicon oxide and silicon oxide.