IP Library Granted Patent US 9,032,357
Granted Patent B1
US 9,032,357 · App. 14/083,050 · Granted May 12, 2015

Generating guiding patterns for directed self-assembly

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Quick Facts
Patent No.
US 9,032,357
App. No.
14/083,050
Granted
May 12, 2015
Kind
B1
Abstract

Aspects of the invention relate to techniques of generating guiding patterns for via-type feature groups. A guiding pattern may be constructed for a via-type feature group that comprises two or more via-type features in a layout design. A backbone structure may then be determined for the guiding pattern. Based on the backbone structure and a self-assembly model, simulated locations of the two or more via-type features are computed. The simulated locations are compared with targeted locations. If the simulated locations do not match the targeted locations based on a predetermined criterion, the simulated locations adjusted to derive modified locations. Using the modified locations, the above operations may be repeated until the simulated locations match the targeted location based on a predetermined criterion or for a predetermined number of times.

Claims (53)

1. One or more processor-readable storage device storing computer-executable instructions for causing one or more processors to perform a method, the method comprising:

receiving information of a via-type feature group, the via-type feature group comprising two or more via-type features in a layout design, the information comprising targeted locations of the two or more via-type features;

constructing a guiding pattern for the via-type feature group based on the targeted locations of the two or more via-type features;

determining a backbone structure for the guiding pattern;

computing simulated locations of the two or more via-type features based on the backbone structure and a self-assembly model; and

comparing the simulated locations with the targeted locations.

2. The one or more processor-readable storage device recited in claim 1 , wherein the method further comprises:

A: adjusting the simulated locations to derive modified locations if the simulated locations do not match the targeted locations based on a predetermined criterion;

B: constructing a new guiding pattern for the via-type feature group based on the modified locations and the shapes of the two or more via-type features and the block copolymer area ratio information;

C: determining a new backbone structure for the new guiding pattern;

D: computing new simulated locations of the two or more via-type features based on the new backbone structure and the self-assembly model; and

E: comparing the new simulated locations with the targeted locations.

3. The one or more processor-readable storage device recited in claim 2 , wherein the method further comprises:

repeating A, B, C, D and E until the new simulated locations match the targeted location based on a predetermined criterion or for a predetermined number of times.

4. The one or more processor-readable storage device recited in claim 1 , wherein the two or more via-type features are grouped together based on at least distances between neighboring via-type features of the two or more via-type features.

5. The one or more processor-readable storage device recited in claim 1 , wherein the via-type feature group is DSA(Directed-Self-Assembly)-compliant.

6. The one or more processor-readable storage device recited in claim 5 , wherein the DSA(Directed-Self-Assembly)-compliant determination is based on distorted areas, a distorted area being an area not covered or covered twice by DSA shells of two neighboring via-type features.

7. The one or more processor-readable storage device recited in claim 1 , wherein the constructing is further based on area ratio information of a di-block copolymer.

8. The one or more processor-readable storage device recited in claim 1 , wherein the self-assembly model is based on elastic potential energy.

9. The one or more processor-readable storage device recited in claim 1 , wherein the determining comprises determining back-bone coordinates for the guiding pattern.

10. A method, executed by at least one processor of a computer, comprising:

receiving information of a via-type feature group, the via-type feature group comprising two or more via-type features in a layout design, the information comprising targeted locations of the two or more via-type features;

constructing a guiding pattern for the via-type feature group based on the targeted locations of the two or more via-type features;

determining a backbone structure for the guiding pattern;

computing simulated locations of the two or more via-type features based on the backbone structure and a self-assembly model; and

comparing the simulated locations with the targeted locations.

11. The method recited in claim 10 , further comprising:

A: adjusting the simulated locations to derive modified locations if the simulated locations do not match the targeted locations based on a predetermined criterion;

B: constructing a new guiding pattern for the via-type feature group based on the modified locations and the shapes of the two or more via-type features and the block copolymer area ratio information;

C: determining a new backbone structure for the new guiding pattern;

D: computing new simulated locations of the two or more via-type features based on the new backbone structure and the self-assembly model; and

E: comparing the new simulated locations with the targeted locations.

12. The method recited in claim 11 , further comprising:

repeating A, B, C, D and E until the new simulated locations match the targeted location based on a predetermined criterion or for a predetermined number of times.

13. The method recited in claim 10 , wherein the two or more via-type features are grouped together based on at least distances between neighboring via-type features of the two or more via-type features.

14. The method recited in claim 10 , wherein the via-type feature group is DSA(Directed-Self-Assembly)-compliant.

15. The method recited in claim 14 , wherein the DSA(Directed-Self-Assembly)-compliant determination is based on distorted areas, a distorted area being an area not covered or covered twice by DSA shells of two neighboring via-type features.

16. The method recited in claim 10 , wherein the constructing is further based on area ratio information of a di-block copolymer.

17. The method recited in claim 10 , wherein the self-assembly model is based on elastic potential energy.

18. The method recited in claim 10 , wherein the determining comprises determining back-bone coordinates for the guiding pattern.

19. A system comprising:

one or more processors, the one or more processors programmed to perform a method, the method comprising:

receiving information of a via-type feature group, the via-type feature group comprising two or more via-type features in a layout design, the information comprising targeted locations of the two or more via-type features;

constructing a guiding pattern for the via-type feature group based on the targeted locations of the two or more via-type features;

determining a backbone structure for the guiding pattern;

computing simulated locations of the two or more via-type features based on the backbone structure and a self-assembly model; and

comparing the simulated locations with the targeted locations.

20. The system recited in claim 19 , wherein the method further comprises:

A: adjusting the simulated locations to derive modified locations if the simulated locations do not match the targeted locations based on a predetermined criterion;

B: constructing a new guiding pattern for the via-type feature group based on the modified locations and the shapes of the two or more via-type features and the block copolymer area ratio information;

C: determining a new backbone structure for the new guiding pattern;

D: computing new simulated locations of the two or more via-type features based on the new backbone structure and the self-assembly model; and

E: comparing the new simulated locations with the targeted locations.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Jun 28, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056696/0081 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2013
From: ROBLES, JUAN ANDRES TORRES; GRANIK, YURI; SAKAJIRI, KYOHEI
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 031623/0995 →