IP Library Granted Patent US 9,093,393
Granted Patent B2
US 9,093,393 · App. 14/083,834 · Granted Jul 28, 2015

Semiconductor device and method for producing the same

Inventor: Toru Suda (Kawasaki, JP)
Assignee: J-DEVICES CORPORATION
H01L23/3157H01L21/563H01L23/147H01L23/49833H01L23/49838H01L24/05H01L24/06H01L24/32H01L24/92H01L25/00H01L25/0657H01L25/50H01L23/3128H01L23/49827H01L23/556H01L24/29H01L24/48H01L24/73H01L24/81H01L24/94H01L2224/0226H01L2224/02245H01L2224/02255H01L2224/0401H01L2224/04042H01L2224/05124H01L2224/05552H01L2224/05554H01L2224/05571H01L2224/05647H01L2224/05655H01L2224/06051H01L2224/06155H01L2224/06156H01L2224/11462H01L2224/131H01L2224/16145H01L2224/16225H01L2224/26145H01L2224/26175H01L2224/2919H01L2224/32145H01L2224/32225H01L2224/48227H01L2224/73204H01L2224/73207H01L2224/73265H01L2224/81193H01L2224/92125H01L2224/92225H01L2224/92247H01L2224/94H01L2225/0651H01L2225/06513H01L2225/06568H01L2924/10253H01L2924/14H01L2924/157H01L2924/15311H01L2924/19107
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Quick Facts
Patent No.
US 9,093,393
App. No.
14/083,834
Granted
Jul 28, 2015
Kind
B2
Abstract

A semiconductor device includes a rectangular lower semiconductor element; a plurality of external electrodes located in a pattern on the lower semiconductor element along sides thereof; a plurality of internal electrodes electrically connected to the plurality of external electrodes via a plurality of line patterns respectively and located on the lower semiconductor element in a pattern; dams provided in such a pattern that each of the dams encloses one or at least two external electrodes among the plurality of external electrodes; an upper semiconductor element mounted on the lower semiconductor element such that a plurality of terminals on the upper semiconductor element are electrically connected to the plurality of internal electrodes respectively; and a resin potted to flow to a space between the lower semiconductor element and the upper semiconductor element.

Claims (23)

1. A semiconductor device, comprising:

a rectangular lower semiconductor element;

a first insulating film provided on a surface of the lower semiconductor element;

a plurality of external electrodes located in a pattern on the first insulating film along sides thereof;

a plurality of internal electrodes electrically connected to the plurality of external electrodes via a plurality of line patterns respectively and located in a pattern on the first insulating film;

a second insulating film, being a thin film, having openings positionally corresponding to the plurality of internal electrodes and the plurality of external electrodes, and provided on the plurality of line patterns;

dams provided in such a pattern that each of the dams encloses one or at least two external electrodes among the plurality of external electrodes;

an upper semiconductor element mounted on the lower semiconductor element such that a plurality of terminals on the upper semiconductor element are electrically connected to the plurality of internal electrodes respectively; and

a resin potted to flow to a space between the lower semiconductor element and the upper semiconductor element.

2. A semiconductor device according to claim 1 , wherein the dams are formed of solder and are formed at the same time as solder bumps formed on the internal electrodes.

3. A semiconductor device according to claim 1 , wherein the dams have a gap therebetween, the gap extending from an area where the resin is potted to an external peripheral area of the lower semiconductor element.

4. A semiconductor device according to claim 1 , wherein at least one of the dams encloses at least two external electrodes among the plurality of external electrodes and extends between the at least two external electrodes.

5. A method for producing a semiconductor device, comprising:

forming, on a rectangular lower semiconductor element, a first insulating film located on a surface of the lower semiconductor element;

forming a plurality of line patterns located on the first insulating film;

forming a plurality of external electrodes located in a pattern along sides of the first insulating film, a plurality of internal electrodes located in a pattern on first insulating film, and line patterns for electrically connecting the plurality of external electrodes and the plurality of internal electrodes to each other respectively on the first insulating film;

forming a second insulating film, being a thin film and having openings positionally corresponding to the plurality of internal electrodes and the plurality of external electrode, on the line patterns;

forming dams such that each of the dams encloses one or at least two external electrodes among the plurality of external electrodes;

mounting an upper semiconductor element on the lower semiconductor element such that a plurality of terminals on the upper semiconductor element are electrically connected to the plurality of internal electrodes respectively; and

potting a resin such that the resin flows to a space between the lower semiconductor element and the upper semiconductor element.

6. A method for producing a semiconductor device according to claim 5 , wherein the dams are formed of solder and are formed at the same time as solder bumps formed on the internal electrodes.

7. A method for producing a semiconductor device according to claim 5 , wherein the dams are formed to have a gap therebetween, the gap extending from an area where the resin is to be potted to an external peripheral area of the lower semiconductor element.

8. A method for producing a semiconductor device according to claim 5 , wherein the dams are formed such that at least one of the dams encloses at least two external electrodes among the plurality of external electrodes and extends between the at least two external electrodes.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY NAME PREVIOUSLY RECORDED AT REEL: 53597 FRAME: 184. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 5, 2021
From: J-DEVICES CORPORATION
To: AMKOR TECHNOLOGY JAPAN, INC.
Reel/Frame 055605/0060 →
CHANGE OF NAME Recorded Aug 25, 2020
From: J-DEVICES CO., LTD.
To: AMKOR TECHNOLOGY JAPAN, INC.
Reel/Frame 053597/0184 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2014
From: SUDA, TORU
To: J-DEVICES CORPORATION
Reel/Frame 031961/0556 →
Priority Claims (1)
JP 2012-253070 · Nov 19, 2012 · national
Continuity (1)
Related Publication 20140138852A1 · May 22, 2014