Contact structure of semiconductor device
View Patent ↗The embodiments described above provide mechanisms of forming contact structures with low resistance. A strained material stack with multiple sub-layers is used to lower the Schottky barrier height (SBH) of the conductive layers underneath the contact structures. The strained material stack includes a SiGe main layer, a graded SiG layer, a GeB layer, a Ge layer, and a SiGe top layer. The GeB layer moves the Schottky barrier to an interface between GeB and a metal germanide, which greatly reduces the Schottky barrier height (SBH). The lower SBH, the Ge in the SiGe top layer forms metal germanide and high B concentration in the GeB layer help to reduce the resistance of the conductive layers underneath the contact structures.
1. A semiconductor device structure, comprising:
a gate structure formed over a surface of a semiconductor substrate;
a recess neighboring the gate structure, wherein the recess is formed below the surface of the semiconductor substrate;
a strained material stack filling the recess, wherein lattice constants of materials in the strained material stack are different from a lattice constant of the substrate, wherein the strain material stack comprises a boron-doped (B-doped) germanium (GeB) layer, a metal-Ge layer, and a metal-SiGe layer; and
a contact structure formed in an inter-layer dielectric (ILD) layer, wherein bottom portion of the contact structure contacts the metal-SiGe layer.
2. The semiconductor device structure of claim 1 , wherein the semiconductor substrate comprises silicon.
3. The semiconductor device structure of claim 1 , wherein boron concentration of the GeB layer is in a range from about 1E20 atoms/cm3 to about 4E20 atoms/cm3.
4. The semiconductor device structure of claim 1 , wherein the metallic element in the metal-Ge layer and in the metal-SiGe layer are the same.
5. The semiconductor device structure of claim 1 , wherein the metallic element in the metal-Ge layer and in the metal-SiGe layer is selected from a group consisting of Ti, Al, Mo, Zr, Hf, Ta, In, Ni, Be, Mg, Ca, Y, Ba, Sr, Sc, and Ga.
6. The semiconductor device structure of claim 1 , wherein the strained material stack extends upward above the surface of the semiconductor substrate.
7. The semiconductor device structure of claim 1 , a depth of the recess is in a range between about 300 Å and about 800 Å.
8. The semiconductor device structure of claim 1 , wherein the gate structure is a replacement gate.
9. The semiconductor device structure of claim 1 , wherein the gate structure is formed over a fin of the semiconductor substrate.
10. The semiconductor device structure of claim 1 , wherein layers of the strain material stack have crystals structures aligned to a crystal structure of the semiconductor substrate.
11. The semiconductor device structure of claim 1 , wherein the strain material stack further comprises a SiGe layer, wherein a main portion of the recess is filled with the SiGe layer, wherein the SiGe layer fills a bottom portion of the recess.
12. The semiconductor device structure of claim 11 , wherein the strain material stack further comprises a graded SiGe layer over the SiGe layer.
13. The semiconductor device structure of claim 12 , wherein Ge concentration of the graded SiGe layer increases in a range from about 30% to about 80% from bottom to top of the graded SiGe layer.
14. A semiconductor device structure, comprising:
a gate structure formed over a surface of a semiconductor substrate;
a recess neighboring the gate structure, wherein the recess is formed below the surface of the semiconductor substrate;
a strained material stack filling the recess, wherein the strain material stack comprises a SiGe layer, a graded SiGe layer, a boron-doped (B-doped) germanium (GeB) layer, a metal-Ge layer, and a metal-SiGe layer; and
a contact structure formed in an inter-layer dielectric (ILD) layer, wherein bottom portion of the contact structure contacts the metal-SiGe layer.
15. The semiconductor device structure of claim 14 , further including a silicon layer underlying the SiGe layer.
16. The semiconductor device structure of claim 14 , wherein the metallic element in the metal-Ge layer and in the metal-SiGe layer is selected from a group consisting of Ti, Al, Mo, Zr, Hf, Ta, In, Ni, Be, Mg, Ca, Y, Ba, Sr, Sc, and Ga.
17. The semiconductor device structure of claim 14 , wherein the strained material stack extends upward above the surface of the semiconductor substrate.
18. A semiconductor device structure, comprising:
a semiconductor fin extending from a surface of a semiconductor substrate, the semiconductor fin and the semiconductor substrate formed of a first semiconductor material;
a gate structure formed over a top surface and respective sidewalls of the semiconductor fin;
a first recess adjacent a first side of the structure and extending below the top surface of the semiconductor fin; and
a first strained material stack filling the recess, the strain material stack including a first layer of a boron-doped (B-doped) layer of second semiconductor material different from the first semiconductor material, a second layer of a metal doped layer of the second semiconductor material on the first layer, and a metal-doped layer of an alloy of the first and second semiconductor material on the second layer.
19. The semiconductor device structure of claim 18 , further comprising a contact structure contacting the metal-doped layer of an alloy of the first and second semiconductor material.
20. The semiconductor device structure of claim 18 , wherein the first semiconductor material comprises silicon and the second semiconductor material comprises germanium.