IP Library Granted Patent US 9,099,570
Granted Patent B2
US 9,099,570 · App. 14/097,556 · Granted Aug 4, 2015

Method for the formation of dielectric isolated fin structures for use, for example, in FinFET devices

Inventors: Nicolas Loubet (Guilderland, NY); Prasanna Khare (Schenectady, NY)
Assignee: STMicroelectronics, Inc.
H01L21/845H01L21/76205H01L21/76283H01L21/823431H01L27/0924H01L29/66818
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Quick Facts
Patent No.
US 9,099,570
App. No.
14/097,556
Granted
Aug 4, 2015
Kind
B2
Abstract

On a substrate formed of a first semiconductor material, a first overlying layer formed of a second semiconductor material is deposited. A second overlying layer formed of a third semiconductor material is deposited over the first overlying layer. The first and second overlying layers are patterned to define fins, wherein each fin includes a first region formed of the third material over a second region formed of the second material. An oxide material fills the space between the fins. A thermal oxidation is then performed to convert the second region to a material insulating the first region formed of the third material from the substrate. As an optional step, the second region formed of the second material is horizontally thinned before the oxide material is deposited and the thermal oxidation is performed. Once the fins are formed and insulated from the substrate, conventional FinFET fabrication is performed.

Claims (36)

1. A method, comprising:

on a substrate formed of a first material, depositing a first overlying layer formed of a second semiconductor material;

depositing over the first overlying layer a second overlying layer formed of a third semiconductor material;

patterning the first and second overlying layers to define a plurality fins, each fin including a first region formed of the third semiconductor material over a second region formed of the second semiconductor material;

depositing an oxide material to fill space between the plurality of fins; and

performing a thermal oxidation to convert the second region to a material insulating the first region formed of the third semiconductor material from the substrate formed of the first material.

2. The method of claim 1 , wherein the first material is silicon, the second semiconductor material is silicon-germanium and the third semiconductor material is silicon.

3. The method of claim 1 , wherein the first material is silicon, the second semiconductor material is silicon-germanium having a first percentage content of germanium and the third material is silicon-germanium having a second percentage content of germanium different from the first percentage content.

4. The method of claim 1 , further comprising forming a FinFET transistor from said plurality of fins.

5. The method of claim 1 , further comprising removing said oxide material filling the space between the plurality of fins so as to expose side surfaces of said first regions formed of the third semiconductor material.

6. The method of claim 5 , further comprising oxidizing the exposed side surfaces of said first regions formed of the third semiconductor material.

7. The method of claim 6 , further comprising depositing a fourth material to cover the oxidized first regions formed of the third semiconductor material.

8. The method of claim 7 , wherein the fourth material is the same as the first material.

9. The method of claim 8 , wherein the first and fourth materials are silicon and the second semiconductor material is silicon-germanium.

10. The method of claim 1 , further comprising horizontally thinning the second region formed of the second semiconductor material before the oxide material is deposited and the thermal oxidation is performed.

11. The method of claim 1 , wherein patterning the first and second overlying layers comprises:

depositing a masking layer over the second overlying layer formed of a third semiconductor material; and

patterning the masking layer to provide a mask for forming the plurality of fins.

12. A method, comprising:

on a substrate formed of a first semiconductor material and having a first region and a second region, depositing an overlying first layer formed of a second semiconductor material;

forming for the first region a first semiconductor material portion over the first layer;

forming for the second region a second semiconductor material portion over the first layer;

patterning the first semiconductor material portion and first layer of the second semiconductor material to define at least one first fin, each first fin including a first part formed of the first semiconductor material portion over a second part formed of the second semiconductor material;

patterning the second material portion and first layer of the second semiconductor material to define at least one second fin, each second fin including a first part formed of the second semiconductor material over a second part formed of the second semiconductor material;

depositing an oxide material to fill space between the first and second fins; and

performing a thermal oxidation to convert the second parts of the first and second fins to a material insulating the first parts of the first and second fins from the substrate formed of the first material.

13. The method of claim 12 , wherein the first semiconductor material is silicon and the second semiconductor material is silicon-germanium.

14. The method of claim 12 , further comprising:

forming a first conductivity type FinFET transistor from said first fin; and

forming a second conductivity type FinFET transistor from said second fin.

15. The method of claim 14 , wherein the first conductivity type is n-type device and second conductivity type is p-type.

16. The method of claim 12 , further comprising horizontally thinning the second parts of the first and second fins before the oxide material is deposited and the thermal oxidation is performed.

17. The method of claim 12 , further comprising removing said oxide material filling the space between the fins so as to expose side surfaces of the first parts of the first and second fins.

18. The method of claim 17 , further comprising oxidizing the exposed side surfaces.

19. The method of claim 18 , further comprising depositing a material to cover the oxidized first parts of the first and second fins.

20. The method of claim 12 , wherein the substrate is a bulk substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2022
From: STMICROELECTRONICS, INC.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 061915/0364 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2013
From: LOUBET, NICOLAS; KHARE, PRASANNA
To: STMICROELECTRONICS, INC.
Reel/Frame 031722/0529 →
Continuity (1)
Related Publication 20150162248A1 · Jun 11, 2015