IP Library Patent Application 14098560
Patent Application
App. No. 14/098,560

SEMICONDUCTOR DIE PACKAGE WITH INSULATED WIRES FOR ROUTING POWER SIGNALS

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Quick Facts
Patent No.
US None
App. No.
14/098,560
Abstract

A semiconductor die package has a die mounted to a die pad. The die has data bond pads and power supply bond pads. Lead fingers are spaced from and project outwardly from the die pad. Each of the lead fingers has a proximal end that is near to a respective edge of the die pad, and a distal end farther from the die pad. The lead fingers include power bar lead fingers and data lead fingers. A power bar bridges the proximal ends of two of the power bar lead fingers. The power bar is between the proximal ends of the data lead fingers and the respective edge of the die pad. Insulated bond wires are used to selectively electrically couple the power bar to the die power supply bond pads.

Claims (28)

1 . A semiconductor die package, comprising:

a die pad;

a semiconductor die mounted to the die pad, the semiconductor die having a die support mounting surface attached to the die pad and an opposite, active surface having both data bonding pads and power supply bonding pads;

a plurality of lead fingers spaced from and projecting outwardly from the die pad, each of the lead fingers having a proximal end that is proximal to a respective edge of the die pad and a distal end farther from the die pad, and wherein the lead fingers include power bar lead fingers and data carrying lead fingers;

a power bar bridging the proximal ends of two of the power bar lead fingers, wherein the power bar is located between the proximal ends of a group of the data carrying lead fingers and the respective edge of the die pad; and

first insulated bond wires selectively electrically coupling the power bar to a plurality of the die power supply bonding pads.

2 . The semiconductor die package of claim 1 , further comprising second insulated bond wires selectively electrically coupling the die data bonding pads to the data carrying lead fingers.

3 . The semiconductor die package of claim 1 , wherein the first insulated bond wires selectively electrically couple the power bar to die power supply bonding pads located along at least two edges of the semiconductor die.

4 . The semiconductor die package of claim 1 , wherein there is only one said power bar.

5 . The semiconductor die package of claim 1 , wherein there is a first said power bar and a second said power bar located adjacent the same respective edge of the die pad, and wherein a first plurality of the first insulated bond wires selectively electrically couple the first power bar to the die power supply bonding pads of a first power rating, and a second plurality of the first insulated bond wires selectively electrically couple the second power bar to the die power supply bonding pads of a another power rating.

6 . The semiconductor die package of claim 1 , further comprising tie bars extending from corner regions of the die pad, wherein at least one of the tie bars has a lead extending therefrom to provide an external ground connection.

7 . The semiconductor die package of claim 6 , further comprising second insulated bond wires selectively electrically coupling the tie bars to at least two of the die power supply bonding pads.

8 . The semiconductor die package of claim 1 , further comprising a first said power bar and a second said power bar located adjacent different respective edges of the die pad, and wherein a first plurality of the first insulated bond wires selectively electrically couple the first power bar to the die power supply bonding pads of a first power rating, and a second plurality of the first insulated bond wires selectively electrically couple the second power bar to the die power supply bonding pads of a another power rating.

9 . The semiconductor die package of claim 1 , further including an encapsulating material covering the semiconductor die and the first insulated bond wires.

10 . The semiconductor die package of claim 9 , wherein the encapsulating material forms a substantially rectangular housing with edges from which the distal ends of the lead fingers protrude, and wherein the distal ends are bent to form mounting feet.

11 . A method of assembling a semiconductor die package, the method comprising:

providing a lead frame that has an outer frame enclosing a centrally located a die pad, tie bars extending from the outer frame and supporting the die pad, a plurality of lead fingers extending from the outer frame towards the die pad, each of the lead fingers having a proximal end that is near to a respective edge of the die pad and a distal end integral with the outer frame, and wherein the lead fingers include power bar lead fingers and data carrying lead fingers, and wherein a power bar bridges the proximal ends of two of the power bar lead fingers so that the power bar is located between the proximal ends of a group of the data carrying lead fingers and one respective edge of the die pad;

mounting a semiconductor die to the die pad, the semiconductor die having a die support mounting surface attached to the die pad and an opposite, active surface having both data bonding pads and power supply bonding pads; and

selectively electrically coupling the power bar to a plurality of the power supply pads with first insulated bond wires.

12 . The method of assembling a semiconductor die package of claim 11 , further including selectively electrically coupling the data bonding pads to the data carrying lead fingers with second insulated bond wires.

13 . The method of assembling a semiconductor die package of claim 11 , wherein selectively electrically coupling the power bar includes selectively electrically coupling the power bar to power supply pads located along at least two edges of the semiconductor die with the first insulated bond wires.

14 . The method of assembling a semiconductor die package of claim 11 , wherein the lead frame has only one said power bar.

15 . The method of assembling a semiconductor die package of claim 11 , wherein the lead frame includes a first said power bar and a second said power bar, and wherein the first insulated bond wires selectively electrically couple the first power bar to the power supply bonding pads of a first power rating, and second insulated bond wires selectively electrically couple the second power bar to the power supply bonding pads of a another power rating.

16 . The method of assembling a semiconductor die package of claim 11 , further comprising a lead extending from at least one of the tie bars to provide an external ground connection.

17 . The method of assembling a semiconductor die package of claim 16 , wherein the selectively electrically coupling includes selectively electrically coupling the tie bars to at least two of the die power supply bonding pads with the first insulated bond wires.

18 . The method of assembling a semiconductor die package of claim 11 , further including covering the semiconductor die and first insulated bond wires with an encapsulating material.

19 . The method of assembling a semiconductor die package of claim 18 , further including separating the tie bars and lead fingers from the outer frame.

20 . The method of assembling a semiconductor die package of claim 19 , further including bending the distal ends of the lead fingers to form mounting feet.

Assignments (18)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FILING AND REMOVE APPL. NO. 14085520 REPLACE IT WITH 14086520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Mar 1, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037926/0642 →
CORRECTIVE ASSIGNMENT OF INCORRECT NUMBER 14085520 PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTON OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037785/0568 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037792/0227 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037879/0581 →
CORRECTIVE ASSIGNMENT OF INCORRECT PATENT APPLICATION NUMBER 14085520 ,PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037785/0454 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037515/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037515/0390 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
Reel/Frame 037458/0399 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
Reel/Frame 037458/0420 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0790 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., COLLATERAL AGENT
Reel/Frame 032445/0689 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032445/0493 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032445/0577 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2013
From: LO, WAI YEW
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 031737/0395 →