IP Library Granted Patent US 9,412,685
Granted Patent B2
US 9,412,685 · App. 14/099,288 · Granted Aug 9, 2016

Semiconductor device and method of manufacturing the same

Inventors: Yoshiyuki Tomonaga (Kawasaki, JP); Mitsuru Ooida (Kawasaki, JP); Katsumi Watanabe (Kawasaki, JP); Hidenari Sato (Kawasaki, JP)
Assignee: J-DEVICES CORPORATION
H01L23/49568H01L21/56H01L21/565H01L23/3128H01L23/3135H01L23/4334H01L24/48H01L24/49H01L24/29H01L24/32H01L24/45H01L24/73H01L2224/05554H01L2224/2919H01L2224/32225H01L2224/45144H01L2224/45147H01L2224/4813H01L2224/48227H01L2224/49175H01L2224/73215H01L2224/73265H01L2924/15311H01L2924/181
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,412,685
App. No.
14/099,288
Granted
Aug 9, 2016
Kind
B2
Abstract

A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer.

Claims (45)

1. A semiconductor device comprising:

a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface;

a semiconductor chip having a plurality of bonding pads on a surface of the semiconductor chip and mounted on the front surface;

a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively;

a first encapsulation layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip; and

a second encapsulation layer formed above the first encapsulation layer and attached to the first encapsulation layer, wherein

the second encapsulation layer has a higher thermal conductivity than a thermal conductivity of the first encapsulation layer, and

a filler of the first encapsulation layer is silica, and a filler of the second encapsulated layer is aluminum or alumina.

2. The semiconductor device according to claim 1 , wherein a heat sink is mounted above the first encapsulation layer by an adhesive and encapsulated by the second encapsulation layer.

3. The semiconductor device according to claim 2 , wherein the thermal conductivity of the adhesive is higher than the thermal conductivity of the first encapsulation layer.

4. A semiconductor device comprising:

a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface;

a semiconductor chip having a plurality of bonding pads on a surface of the semiconductor chip and mounted on the front surface;

a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively;

a first encapsulation layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip;

a heat sink mounted above the first encapsulation layer by an adhesive; and

a second encapsulation layer sealing the first encapsulation layer,

wherein the heat sink is formed above the first encapsulation layer.

5. A method of manufacturing a semiconductor device comprising:

mounting a semiconductor chip having a plurality of bonding pads on a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface;

connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively;

forming a first encapsulation layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip; and

forming a second encapsulation layer, which has a higher viscosity than a viscosity of the first encapsulated layer, above the first encapsulation layer and attached to the first encapsulation layer,

wherein the second encapsulation layer has a higher thermal conductivity than a thermal conductivity of the first encapsulation layer.

6. The method of manufacturing a semiconductor device according to claim 5 , wherein after forming the first encapsulation layer, mounting a heat sink above the first encapsulation layer by an adhesive and forming a second encapsulation layer above the heat sink.

7. The method of manufacturing a semiconductor device according to claim 5 , wherein viscosity of a sealing material which comprises the first encapsulation layer is lower than viscosity of a sealing material which comprises the second encapsulation layer.

8. A method of manufacturing a semiconductor device comprising:

mounting a semiconductor chip having a plurality of bonding pads on a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface;

connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively;

forming a first encapsulation layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip;

mounting a heat sink above the first encapsulation layer by an adhesive; and

forming a second encapsulation layer above the first encapsulation layer and the heat sink.

9. A semiconductor device comprising:

a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface;

a semiconductor chip having a plurality of bonding pads on a surface of the semiconductor chip and mounted on the front surface;

a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively;

a first encapsulation layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip;

a heat sink mounted above the first encapsulation layer; and

a second encapsulation layer sealing the first encapsulation layer, wherein the heat sink is encapsulated by the second encapsulation layer, and the second encapsulation layer and the first encapsulation layer are comprised of the same sealing material.

10. A method of manufacturing a semiconductor device comprising:

mounting a semiconductor chip having a plurality of bonding pads on a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface;

connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively;

forming a first encapsulation layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip; and

forming a second encapsulation layer above the first encapsulation layer and attached to the first encapsulation layer, in a process separate from the forming the first encapsulation layer,

wherein the second encapsulation layer and the first encapsulation layer are comprised of the same sealing material.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY NAME PREVIOUSLY RECORDED AT REEL: 53597 FRAME: 184. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 5, 2021
From: J-DEVICES CORPORATION
To: AMKOR TECHNOLOGY JAPAN, INC.
Reel/Frame 055605/0060 →
CHANGE OF NAME Recorded Aug 25, 2020
From: J-DEVICES CO., LTD.
To: AMKOR TECHNOLOGY JAPAN, INC.
Reel/Frame 053597/0184 →
RECORD TO CORRECT ASSIGNEE'S ADDRESS TO SPECIFY J-DEVICES CORPORATION, 1913-2 FUKURA, USUKI-CITY, OITA, 875-0053, JAPAN, PREVIOUSLY RECORDED AT REEL 032081, FRAME 0926. Recorded Feb 19, 2014
From: TOMONAGA, YOSHIYUKI; OOIDA, MITSURU; WATANBE, KATSUMI; SATO, HIDENARI
To: J-DEVICES CORPORATION
Reel/Frame 032365/0115 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2013
From: TOMONAGA, YOSHIYUKI; OOIDA, MITSURU; WATANABE, KATSUMI; SATO, HIDENARI
To: J-DEVICES CORPORATION
Reel/Frame 032081/0926 →
Priority Claims (1)
JP 2012-267892 · Dec 7, 2012 · national
Continuity (1)
Related Publication 20140159215A1 · Jun 12, 2014