IP Library Granted Patent US 9,093,732
Granted Patent B2
US 9,093,732 · App. 14/103,005 · Granted Jul 28, 2015

Low power, high speed multi-channel chip-to-chip interface using dielectric waveguide

Inventors: Hyeon Min Bae (Seoul, KR); Ha Il Song (Daejeon, KR); Huxian Jin (Daejeon, KR)
Assignee: Korea Advanced Institute of Science and Technology
H01P3/122H01P3/16H01P5/087H01P5/107
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,093,732
App. No.
14/103,005
Granted
Jul 28, 2015
Kind
B2
Abstract

An exemplary embodiment of the present invention provides an improved dielectric waveguide named electrical fiber. The electrical fiber with a metal cladding may isolate the interference of the signals in other wireless channels and adjacent electrical fibers, which typically causes band-limitation problem, for a smaller radiation loss and better signal guiding to lower the total transceiver power consumption as the transmit distance increases. Also, the electrical fiber may have frequency independent attenuation characteristics to enable high data rate transfer with little or even without any additional receiver-side compensation due to vertical coupling of the electrical fiber and an interconnection device.

Claims (13)

1. A board-to-board interconnection device with an electrical fiber, the interconnection device comprising:

an electrical fiber to propagate a signal from a transmitter side board to a receiver side board with a metal cladding;

a microstrip circuit to contact with the electrical fiber with a microstrip-to-waveguide transition (MWT),

a microstrip feeding line to feed the signal to the microstrip circuit at a first layer;

a slotted ground plane including a slot to minimize a ratio of backward propagation wave to forward propagation wave at a second layer;

a ground plane including an array of vias to make an electrical connection between the slotted ground plane and the ground plane at a third layer; and

a patch to radiate the signal at a resonance frequency.

2. The interconnection device of claim 1 , wherein at least one of both ends of the electrical fiber is tapered for impedance matching between the electrical fiber and the microstrip circuit on the interconnection device.

3. The interconnection device of claim 1 , wherein at least one of both ends of the electrical fiber is shaped linearly to optimize an impedance of the electrical fiber with a largest power transfer efficiency.

4. The interconnection device of claim 1 , wherein the metal cladding comprises copper cladding.

5. The interconnection device of claim 1 , wherein the interconnection device further comprises,

a board-to-fiber connector to connect the electrical fiber to at least one of the transmitter side board and the receiver side board vertically.

6. The interconnection device of claim 1 , wherein a proportionality of a length of the metal cladding on a length of the electrical fiber is designed based on a length of the electrical fiber.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2023
From: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
To: POINT2 TECHNOLOGY, INC.
Reel/Frame 062732/0041 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2013
From: BAE, HYEON MIN; SONG, HA IL; JIN, HUXIAN
To: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Reel/Frame 031762/0472 →
Priority Claims (2)
KR 10-2012-0154094 · Dec 27, 2012 · national
KR 10-2013-0123344 · Oct 16, 2013 · national
Continuity (1)
Related Publication 20140184351A1 · Jul 3, 2014