IP Library Granted Patent US 9,196,786
Granted Patent B2
US 9,196,786 · App. 14/104,105 · Granted Nov 24, 2015

Semiconductor light emitting element and method for manufacturing the same

Inventors: Hajime Nago (Kanagawa-ken, JP); Shigeya Kimura (Kanagawa-ken, JP); Yoshiyuki Harada (Ishikawa-ken, JP); Shinya Nunoue (Chiba-ken, JP)
Assignee: Kabushiki Kaisha Toshiba
H01L33/06B82Y20/00H01L33/325H01S5/34333H01S5/34346H01L33/007H01L33/025H01L33/14H01S5/3211H01S5/3407
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Quick Facts
Patent No.
US 9,196,786
App. No.
14/104,105
Granted
Nov 24, 2015
Kind
B2
Abstract

According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer and a light emitting layer. The p-type semiconductor layer includes a first p-side layer of Al x1 Ga 1−x1 N (0≦x1<1) including Mg, a second p-side layer of Al x2 Ga 1−x2 N (0<x2<1) including Mg and a third p-side layer of Al x3 Ga 1−x3 N (x2<x3<1) including Mg. The light emitting layer is provided between the n-type semiconductor layer and the second p-side layer. The light emitting layer includes barrier layers and well layers. Each of the well layers is provided between the barrier layers. A p-side barrier layer of the barrier layers most proximal to the second p-side layer includes a first layer of Al z1 Ga 1−z1 N (0≦z1), and a second layer of Al z2 Ga 1−z2 N (z1<z2<x2).

Claims (36)

1. A semiconductor light emitting element, comprising:

an n-type semiconductor layer including a nitride semiconductor;

a p-type semiconductor layer including

a first p-side layer of Al x1 Ga 1−x1 N (0≦x1<1) including Mg,

a second p-side layer of Al x2 Ga 1−x2 N (0<x2<1) including Mg provided between the first p-side layer and the n-type semiconductor layer, and

a third p-side layer of Al x3 Ga 1−x3 N (x2<x3<1) including Mg provided between the first p-side layer and the second p-side layer; and

a light emitting layer provided between the n-type semiconductor layer and the second p-side layer, the light emitting layer including a plurality of barrier layers and a plurality of well layers provided respectively between the barrier layers,

a p-side barrier layer of the barrier layers most proximal to the second p-side layer including

a first layer of Al z1 Ga 1−z1 N (0≦z1), and

a second layer of Al z2 Ga 1−z2 N (z1<z2<x2) provided between the first layer and the second p-side layer to contact the first layer and the second p-side layer,

a thickness of the p-side barrier layer being less than 3.5 nanometers,

wherein a thickness of a p-side well layer of the plurality of well layers most proximal to the second p-side layer is thicker than a thickness of the one other well layer of the plurality of well layers.

2. The element according to claim 1 , wherein the thickness of the p-side well layer is not less than 3 nanometers and not more than 6 nanometers.

3. The element according to claim 2 , wherein a thickness of a well layer of the plurality of well layers other than the p-side well layer is less than 6 nanometers and not less than 1.5 nanometers.

4. The element according to claim 1 , wherein

each of the plurality of well layers includes In, and

an In composition ratio of the p-side well layer is lower than an In composition ratio of the one other well layer of the plurality of well layers.

5. The element according to claim 1 , wherein the x3 is not less than 0.15 and not more than 0.25.

6. The element according to claim 1 , wherein the x2 is less than 0.15 and not less than 0.03.

7. The element according to claim 1 , wherein the z2 is less than 0.03 and not less than 0.003.

8. The element according to claim 1 , wherein a thickness of the first layer is thicker than a thickness of the second layer.

9. The element according to claim 1 , wherein a thickness of the first layer is less than 3 nanometers and not less than 2 nanometers.

10. The element according to claim 9 , wherein a thickness of the second layer is less than 1.5 nanometers and not less than 0.5 nanometers.

11. The element according to claim 1 , wherein a total of a thickness of the first layer and a thickness of the second layer is less than 3.5 nanometers.

12. The element according to claim 1 , wherein a thickness of the second p-side layer is not less than 5 nanometers and not more than 20 nanometers.

13. The element according to claim 1 , wherein a thickness of the third p-side layer is not less than 5 nanometers and not more than 20 nanometers.

14. The element according to claim 1 , wherein the p-type semiconductor layer further includes a fourth p-side layer of Al x4 Ga 1−x4 N (0 ≦x4<1 and x4<x3) including Mg provided between the first p-side layer and the third p-side layer.

15. The element according to claim 14 , wherein the x4 is less than the x2.

16. The element according to claim 1 , wherein a barrier layer of the plurality of barrier layers other than the p-side barrier layer is a GaN layer.

17. The element according to claim 1 , wherein a peak wavelength of light emitted from the light emitting layer is not less than 400 nanometers and not more than 650 nanometers.

18. The element according to claim 1 , wherein the plurality of well layers include In y2 Ga 1−y2 N (0.08≦y2≦0.18).

19. A method for manufacturing a semiconductor light emitting element, the element including an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer provided between the n-type semiconductor layer and a second p-side layer, the n-type semiconductor layer including a nitride semiconductor, the p-type semiconductor layer including a first p-side layer of Al x1 Ga 1−x1 N (0≦x1<1) including Mg, the second p-side layer of Al x2 Ga 1−x2 N (0<x2<1) including Mg provided between the first p-side layer and the n-type semiconductor layer, and a third p-side layer of Al x3 Ga 1−x3 N (x2<x3<1) including Mg provided between the first p-side layer and the second p-side layer, the light emitting layer including a plurality of barrier layers and a plurality of well layers provided respectively between the plurality of barrier layers, the method comprising:

forming the light emitting layer on the n-type semiconductor layer; and

forming the p-type semiconductor layer on the light emitting layer,

the forming of the light emitting layer including making a p-side barrier layer of the plurality of barrier layers most proximal to the second p-side layer to include a first layer of Al z1 Ga 1−z1 N (0≦z1) and a second layer of Al z2 Ga 1−z2 N (z1<z2<x2), the first layer being provided between the n-type semiconductor layer and the second p-side layer, the second layer being provided between the first layer and the second p-side layer to contact the first layer and the second p-side layer, a thickness of the p-side barrier layer being less than 3.5 nanometers,

wherein a thickness of a p-side well layer of the plurality of well layers most proximal to the second p-side layer is thicker than a thickness of the one other well layer of the plurality of well layers.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2020
From: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
To: SEOUL SEMICONDUCTOR CO., LTD.
Reel/Frame 052316/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2020
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA ELECTRONIC DEVICES AND STORAGE CORPORATION
Reel/Frame 051691/0442 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2013
From: NAGO, HAJIME; KIMURA, SHIGEYA; HARADA, YOSHIYUKI; NUNOUE, SHINYA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 031770/0489 →
Priority Claims (1)
JP 2012-287340 · Dec 28, 2012 · national
Continuity (1)
Related Publication 20140183447A1 · Jul 3, 2014