IP Library Granted Patent US 9,425,115
Granted Patent B2
US 9,425,115 · App. 14/104,658 · Granted Aug 23, 2016

Glass frit wafer bond protective structure

Inventors: Ruben B. Montez (Cedar Park, TX); Robert F. Steimle (Austin, TX)
Assignee: FREESCALE SEMICONDUCTOR, INC.
H01L23/10H01L23/04H01L21/743H01L24/05H01L24/06H01L24/94H01L2224/04042H01L2224/06155H01L2224/83H01L2224/94H01L2924/14H01L2924/1461H01L2924/16152H01L2924/16235H01L2924/16251H01L2924/16788
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Quick Facts
Patent No.
US 9,425,115
App. No.
14/104,658
Granted
Aug 23, 2016
Kind
B2
Abstract

A bonded semiconductor device comprising a support substrate, a semiconductor device located with respect to one side of the support substrate, a cap substrate overlying the support substrate and the device, a glass frit bond ring between the support substrate and the cap substrate, an electrically conductive ring between the support substrate and the cap substrate. The electrically conductive ring forms an inner ring around the semiconductor device and the glass frit bond ring forms an outer bond ring around the semiconductor device.

Claims (26)

1. A bonded semiconductor device comprising:

a device substrate with a semiconductor device located with respect to one side of the device substrate;

a cap substrate overlying the one side of the device substrate and the semiconductor device, wherein the cap substrate includes a semiconductor material;

a glass frit bond ring between the device substrate and the cap substrate, wherein the cap substrate is bonded to the device substrate at least by the glass frit bond ring;

an electrically conductive ring between the device substrate and the cap substrate, wherein the electrically conductive ring forms an inner ring around the semiconductor device and the glass frit bond ring forms an outer ring around the semiconductor device.

2. The device of claim 1 , wherein the electrically conductive ring prevented glass frit of the glass frit bond ring from flowing in an area where the semiconductor device is located.

3. The device of claim 1 , wherein the electrically conductive ring is discontinuous around the semiconductor device.

4. The device of claim 1 , wherein the electrically conductive ring is continuous around the semiconductor device.

5. The device of claim 1 wherein the semiconductor device is hermetically sealed at least by the cap substrate being bonded by the glass frit bond ring to the device substrate.

6. The device of claim 1 , wherein the electrically conductive ring provides electrical grounding for the cap substrate.

7. The device of claim 1 , wherein the electrically conductive ring includes a poly silicon portion, a mono crystalline portion, and a metal portion in between the poly silicon portion and the mono crystalline portion.

8. The device of claim 7 wherein the mono crystalline portion of the electrically conductive ring has a net conductivity dopant that is greater than a portion of the cap substrate made of mono crystalline silicon.

9. The device of claim 1 , wherein the glass frit bond ring includes a ring of glass frit material and a ring of poly silicon in contact with the ring of glass frit material.

10. The device of claim 1 further comprising:

an electrically conductive pad located with respect to the one side of the device substrate located outside the electrically conductive ring and the glass frit bond ring.

11. The device of claim 1 wherein the device substrate includes a layer of dielectric material located over a layer of semiconductor material, the layer of dielectric material including an opening wherein the electrically conductive ring is in electrical contact with the layer of semiconductor material through the opening.

12. The device of claim 2 , wherein the electrically conductive ring provides electrical grounding for the cap substrate.

13. The device of claim 5 , wherein the electrically conductive ring provides electrical grounding for the cap substrate.

14. The device of claim 6 , wherein the electrically conductive ring includes a poly silicon portion, a mono crystalline portion, and a metal portion in between the poly silicon portion and the mono crystalline portion.

15. The device of claim 14 wherein the mono crystalline portion of the electrically conductive ring has a net conductivity dopant that is greater than a portion of the cap substrate made of mono crystalline silicon.

16. The device of claim 2 , wherein the glass frit bond ring includes a ring of glass frit material and a ring of poly silicon in contact with the ring of glass frit material.

17. The device of claim 5 , wherein the glass frit bond ring includes a ring of glass frit material and a ring of poly silicon in contact with the ring of glass frit material.

18. The device of claim 5 wherein the device substrate includes a layer of dielectric material located over a layer of semiconductor material, the layer of dielectric material including an opening wherein the electrically conductive ring is in electrical contact with the layer of semiconductor material through the opening.

19. The device of claim 6 wherein the device substrate includes a layer of dielectric material located over a layer of semiconductor material, the layer of dielectric material including an opening wherein the electrically conductive ring is in electrical contact with the layer of semiconductor material through the opening.

20. The device of claim 7 wherein the device substrate includes a layer of dielectric material located over a layer of semiconductor material, the layer of dielectric material including an opening wherein the electrically conductive ring is in electrical contact with the layer of semiconductor material through the opening.

21. The device of claim 1 wherein the cap substrate and the device substrate are physically coupled through the electrically conductive ring.

Assignments (20)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FILING AND REMOVE APPL. NO. 14085520 REPLACE IT WITH 14086520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Mar 1, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037926/0642 →
CORRECTIVE ASSIGNMENT OF INCORRECT PATENT APPLICATION NUMBER 14085520 ,PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037785/0454 →
CORRECTIVE ASSIGNMENT OF INCORRECT NUMBER 14085520 PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTON OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037785/0568 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037792/0227 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037879/0581 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037515/0390 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037515/0420 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
Reel/Frame 037458/0399 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
Reel/Frame 037458/0420 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., COLLATERAL AGENT
Reel/Frame 032445/0689 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032445/0577 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032445/0493 →
Continuity (2)
Division 13460020 · Apr 30, 2012
Related Publication 20160218045A1 · Jul 28, 2016