Calibration circuit for an analog-to-digital converter
View Patent ↗The present disclosure relates to a calibration circuit for an analog-to-digital converter (ADC). The calibration circuit includes a digital-to-analog converter (DAC) configured to generate a calibration voltage from a digital input, and a DC feedback control circuit. The DC feedback control circuit includes an ADC driver configured to operate in both an ADC calibration mode and in an ADC operation mode such that dynamic parameters of the ADC driver are unchanged when the ADC driver is operating in the ADC calibration mode and when the ADC driver is operating in the ADC operation mode. The DC feedback control circuit is also configured to: receive the calibration voltage from the DAC; modify the calibration voltage by cancelling offsets in the calibration voltage; and provide the modified calibration voltage to the ADC.
1. A calibration circuit for an analog-to-digital converter (ADC), the calibration circuit comprising:
a digital-to-analog converter (DAC) configured to generate a calibration voltage from a digital input; and
a DC feedback control circuit comprising an ADC driver and an operational amplifier, the ADC driver configured to operate in both an ADC calibration mode and in an ADC operation mode such that dynamic parameters of the ADC driver are unchanged when the ADC driver is operating in the ADC calibration mode and when the ADC driver is operating in the ADC operation mode;
the DC feedback control circuit configured to:
receive the calibration voltage from the DAC;
modify the calibration voltage by suppressing offsets in the calibration voltage; and
provide the modified calibration voltage to the ADC.
2. The calibration circuit of claim 1 , wherein
the DAC has an internal resistance;
the DC feedback control circuit forms a transimpedance differential amplifier;
the DAC internal resistance and the DC feedback control circuit together form an inverting unity gain differential amplifier;
the DC feedback control circuit has a feedback loop impedance, the feedback loop impedance being equal to the internal resistance of the DAC to match the internal resistance of the DAC to the transimpedance of the differential transimpedance amplifier.
3. The calibration circuit of claim 1 , wherein
an input of the operational amplifier is coupled to an output of the DAC to receive the generated calibration voltage;
an output of the operational amplifier is coupled to an input of the ADC driver; and
an output of the ADC driver is coupled to the input of the operational amplifier and an output of the calibration circuit to provide the modified calibration voltage to the ADC.
4. The calibration circuit of claim 2 , wherein the transimpedance differential amplifier formed by the DC feedback control circuit has non-unity gain.
5. The calibration circuit of claim 2 , wherein the transimpedance differential amplifier formed by the DC feedback control circuit has unity gain.
6. The calibration circuit of claim 1 , further comprising:
a differential input for receiving an ADC input signal;
a first pair of switches coupled to the differential input of the calibration circuit and to an input of the ADC driver, the first pair of switches configured to connect the differential input to the input of the ADC driver when the ADC driver is operating in the ADC calibration mode and to disconnect the differential input from the input of the ADC driver when the ADC driver is operating in the ADC operation mode.
7. The calibration circuit of claim 6 , further comprising:
a second pair of switches coupled to input of the ADC driver and to a ground via a pair of resistors, the second pair of switches being configured to connect the input of the ADC driver to the ground via the pair of resistors so that a source impedance and dynamic properties of the ADC driver are unchanged when operating in ADC calibration mode and when operating in ADC operation mode.
8. The calibration circuit of claim 6 , further comprising an RC equalizer coupled to the differential input for DC coupling a differential voltage of a signal received on the differential input, and wherein the operational amplifier is an integrating operational amplifier.
9. The calibration circuit of claim 8 , further comprising a third pair of switches coupled to the output of the DAC and to the input of the operational amplifier, the third pair of switches configured to connect the output of the DAC to the input of the operational amplifier when the ADC driver is operating in the ADC calibration mode and to disconnect the output of the DAC from the input of the operational amplifier when the ADC driver is operating in the ADC operation mode to increase a loop gain of the feedback control circuit.
10. The calibration circuit of claim 1 , wherein the DC feedback control circuit is configured to suppress static errors generated by the ADC driver.
11. The calibration circuit of claim 10 , wherein the static errors comprise a voltage offset generated by the ADC driver.
12. The calibration circuit of claim 10 , wherein the static errors comprise a leakage current generated by the ADC driver.
13. A method for calibrating and operating an analog-to-digital converter (ADC), comprising:
generating, at a digital-to-analog converter (DAC), a calibration voltage from a digital input;
providing a DC feedback control circuit comprising an ADC driver and an operational amplifier;
operating the ADC driver in an ADC calibration mode to modify the calibration voltage by suppressing offsets in the calibration voltage and to provide the modified calibration voltage to the ADC, the ADC driver having dynamic parameters in the ADC calibration mode, the dynamic parameters having a first set of values; and
operating the ADC driver in an ADC operation mode, the ADC driver maintaining the first set of values of the dynamic parameters in the ADC operation mode.