IP Library Granted Patent US 9,369,261
Granted Patent B2
US 9,369,261 · App. 14/108,745 · Granted Jun 14, 2016

Circuit for baseband harmonic rejection

Inventors: Yoshikazu Furuta (Kanagawa, JP); Mark Maria Albert Ingels (Boutersem, BE)
Assignees: IMEC; RENESAS Electronics Corporation
H04L5/143H04B1/0475
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,369,261
App. No.
14/108,745
Granted
Jun 14, 2016
Kind
B2
Abstract

A circuit for reducing counter-intermodulation in a modulated signal caused by an oscillator frequency and harmonics of a baseband signal is disclosed. The circuit comprises a first and a second baseband section arranged for generating a first and a second version of a baseband signal, the second version being phase shifted with respect to the first version. The circuit further comprises three signal paths comprising mixers for multiplication of the first and second version of the baseband signal with a local oscillator signal, so that three upconverted signals with rotated phase with respect to each other are obtained, and arranged for applying a scaling with a scaling factor corresponding to the rotated phases. The circuit further comprises a combination unit arranged for combining the three upconverted signals.

Claims (26)

1. A circuit for reducing counter-intermodulation in a modulated signal caused by an oscillator frequency and harmonics of a baseband signal, the circuit comprising:

a first baseband section configured to generate a first baseband signal comprising a first in-phase component and a first quadrature component;

a second baseband section configured to generate a second baseband signal, the second baseband signal being phase shifted with respect to the first baseband signal, the second baseband signal comprising a second in-phase component and a second quadrature component being phase shifted from the respective first components; and

three signal paths, each signal path comprising a mixer for multiplication of the first and second baseband signals with a local oscillator signal, whereby the local oscillator signal in one signal path is a phase-rotated version of the local oscillator signal in the other two signal paths, so that three upconverted signals with rotated phase with respect to each other are obtained, and each signal path further comprising a scaling unit configured to apply a scaling factor dependent on the rotated phases; and

a combination unit configured to combine the three upconverted signals.

2. The circuit of claim 1 , wherein the scaling unit is configured to apply the scaling factor before mixing with the local oscillator signal.

3. The circuit of claim 1 , wherein the scaling unit is configured to apply the scaling factor to the upconverted signals.

4. The circuit of claim 1 , wherein the mixers are configured to operate with a duty cycle of 25%.

5. A transmitter device comprising a circuit for reducing counter-intermodulation as in claim 1 .

6. A circuit for reducing counter-intermodulation in a modulated signal caused by an oscillator frequency and harmonics of a baseband signal, the circuit comprising:

a first baseband section configured to generate a first baseband signal comprising a first in-phase component and a first quadrature component;

a second baseband section configured to generate a second baseband signal, the second baseband signal being phase shifted with respect to the first baseband signal, the second baseband signal comprising a second in-phase and a second quadrature component being phase shifted from the respective first components; and

three signal paths, each signal path comprising a mixer for multiplication of the first and second baseband signals with a local oscillator signal, whereby the local oscillator signal in one signal path is a phase-rotated version of the local oscillator signal in the other two signal paths, so that three upconverted signals with rotated phase with respect to each other are obtained, and each signal path further comprising a scaling unit configured to apply a scaling factor dependent on the rotated phases;

a combination unit configured to combine the three upconverted signals; and

a power amplifier connected to the first and second baseband sections, the first and second baseband sections each comprising an active filter arranged for driving a part of the power amplifier.

7. The circuit of claim 6 , wherein the scaling unit is configured to apply the scaling factor in the power amplifier.

8. The circuit of claim 6 , wherein the active filter comprises a second order low-pass filter.

9. The circuit of claim 6 , wherein the active filter is followed by an out-of-band noise filter configured to filter out-of-band noise.

10. The circuit of claim 9 , wherein the out-of-band noise filter is digitally controllable from a voltage supply, the voltage supply voltage higher than a nominal digital voltage.

11. The circuit of claim 9 , wherein the out-of-band noise filter comprises thick oxide transistors.

12. A circuit for reducing counter-intermodulation in a modulated signal caused by an oscillator frequency and harmonics of a baseband signal, the circuit comprising:

means for generating a first baseband signal comprising a first in-phase and a first quadrature component;

means for generating a second version of the baseband signal, the second version being phase shifted with respect to the first baseband signal, the second baseband signal comprising a second in-phase component and a second quadrature component being phase shifted from the respective first components; and

means for multiplying, on three signal paths, the first and second version of the baseband signal with a local oscillator signal, whereby the local oscillator signal in one signal path is a phase-rotated version of the local oscillator signal in the other two signal paths, so that three upconverted signals with rotated phase with respect to each other are obtained;

means for applying a scaling factor dependent on the rotated phases on each signal path; and

means for combining the three upconverted signals.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE RENASAS ELECTRONICS CORPORATION TO RENESAS ELECTRONICS CORPORATION PREVIOUSLY RECORDED ON REEL 038231 FRAME 0912. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNORS INTEREST. Recorded Apr 25, 2016
From: FURUTA, YOSHIKAZU; INGELS, MARK MARIA ALBERT
To: IMEC; RENESAS ELECTRONICS CORPORATION
Reel/Frame 038516/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2016
From: FURUTA, YOSHIKAZU; INGELS, MARK MARIA ALBERT
To: IMEC; RENASAS ELECTRONICS CORPORATION
Reel/Frame 038231/0912 →
Priority Claims (1)
EP 12198069 · Dec 19, 2012 · regional
Continuity (1)
Related Publication 20140169237A1 · Jun 19, 2014