Method of manufacture for a semiconductor device
View Patent ↗A method of manufacturing a semiconductor device includes providing a semiconductor layer of a first conductivity type and forming a semiconductor layer of a second conductivity type thereon. The method also includes forming an insulator layer on the semiconductor layer of the second conductivity type, etching a trench into at least the semiconductor layer of the second conductivity type, and forming a thermal oxide layer in the trench and on the semiconductor layer of the second conductivity type. The method further includes implanting ions into the thermal oxide layer, forming a second insulator layer, removing the second insulator layer from a portion of the trench, and forming an oxide layer in the trench and on the epitaxial layer. Moreover, the method includes forming a material in the trench, forming a second gate oxide layer over the material, and patterning the second gate oxide layer.
1. A method of manufacturing a semiconductor device, the method comprising:
providing a semiconductor layer of a first conductivity type;
forming a semiconductor layer of a second conductivity type on the semiconductor layer of the first conductivity type;
forming an insulator layer on the semiconductor layer of the second conductivity type;
etching one or more trenches into at least the semiconductor layer of the second conductivity type;
forming a second insulator layer in the one or more trenches;
implanting ions into the second insulator layer;
forming a third insulator layer, thereby filling at least a portion of the one or more trenches;
etching an additional trench into at least the semiconductor layer of the second conductivity type;
forming a gate oxide layer in the additional trench;
forming a gate material in the additional trench;
forming one or more device regions;
forming a source metal layer;
wherein the ions comprise cesium ions; and
further comprising performing a thermal treatment to anneal the cesium ions.
2. The method of claim 1 further comprising:
forming a second oxide layer over the gate material; and patterning the second oxide layer prior to forming the source metal layer.
3. The method of claim 1 further comprising: thinning the semiconductor layer of the first conductivity type; and forming a drain metal layer.
4. The method of claim 1 wherein the semiconductor layer of a first conductivity type comprises an n+ doped substrate doped with at least one of phosphorus, antimony, or arsenic.
5. The method of claim 1 wherein the semiconductor layer of the first conductivity type comprises a p+ doped substrate.
6. The method of claim 5 wherein the semiconductor layer of the first conductivity type comprises a p-type material layer.
7. A method of manufacturing a semiconductor device, the method comprising:
providing a semiconductor layer of a first conductivity type;
forming a semiconductor layer of a second conductivity type on the semiconductor layer of the first conductivity type;
forming an insulator layer on the semiconductor layer of the second conductivity type;
etching a trench into at least the semiconductor layer of the second conductivity type;
forming an oxide layer in the trench and on the semiconductor layer of the second conductivity type;
implanting ions into the oxide layer;
forming a second insulator layer, thereby filling the trench;
forming one or more device regions;
forming a metal layer;
wherein the ions comprise cesium ions; and
further comprising performing a thermal treatment to anneal the cesium ions.