IP Library Patent Application 14115710
Patent Application
App. No. 14/115,710

INTEGRATED CIRCUIT DEVICE AND METHOD FOR SELF-HEATING AN INTEGRATED CIRCUIT DEVICE

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Patent No.
US None
App. No.
14/115,710
Abstract

An integrated circuit device comprises a first clock signal source, arranged to provide at least one first clock signal; a second clock signal source, arranged to provide at least one second clock signal different from the at least one first clock signal; and a plurality of sequential logic cells, at least one of the plurality connected to receive, in a first mode, the at least one first clock signal or at least one clock signal derived from the at least one first clock signal, and to receive, in a second mode, the at least one second clock signal or at least one clock signal derived from the at least one second clock signal; wherein in the second mode the at least one second clock signal is adapted to the at least one of the plurality of sequential logic cells to generate in at least a portion of the integrated circuit device a current consumption when the at least one first clock signal is not a toggling signal.

Claims (25)

1 . An integrated circuit device, comprising

a first clock signal source, arranged to provide at least one first clock signal;

a second clock signal source, arranged to provide at least one second clock signal; and

a plurality of sequential logic cells, at least one of said plurality connected to receive, in a first mode, said at least one first clock signal or at least one clock signal derived from said at least one first clock signal, and to receive, in a second mode, said at least one second clock signal or at least one clock signal derived from said at least one second clock signal; wherein in said second mode said at least one second clock signal is adapted to said at least one of said plurality of sequential logic cells to generate in at least a portion of said integrated circuit device a current consumption when said at least one first clock signal is not a toggling signal.

2 . The integrated circuit device as claimed in claim 1 , wherein said portion of said integrated circuit device comprises said at least one of said plurality of sequential logic cells.

3 . The integrated circuit device as claimed in claim 1 , comprising a clock distribution network having at least one input terminal connected to said first and second clock signal sources, and at least one output terminal connected to said plurality of sequential logic cells; said clock distribution network being arranged to receive said at least one first clock signal in said first mode and said at least one second clock signal in said second mode and to provide said at least one first clock signal or said at least one clock signal derived from said at least one first clock signal in said first mode, and to provide said at least one second clock signal or said at least one clock signal derived from said at least one second clock signal in said second mode.

4 . The integrated circuit device as claimed in claim 3 , wherein said portion of said integrated circuit device comprises at least a part of said clock distribution network.

5 . The integrated circuit device as claimed in claim 1 , wherein said at least one of said plurality of sequential logic cells comprises a reset-input arranged to receive a reset signal; and wherein said reset signal is enabled when said integrated circuit device is in said second mode.

6 . The integrated circuit device as claimed in claim 1 , wherein a clock rate of at least one second clock signal is higher than a clock rate of said at least one first clock signal.

7 . The integrated circuit device as claimed in claim 1 , wherein said second clock source comprises a first ring oscillator circuit.

8 . The integrated circuit device as claimed in claim 1 , wherein said at least one second clock signal is a steady-state signal.

9 . The integrated circuit device as claimed in claim 1 , comprising

a temperature sensing unit arranged to provide a temperature measurement of said integrated circuit device; and

a mode controller unit arranged to switch said integrated circuit device from said second mode into said first mode when a value of said temperature measurement is above a threshold value corresponding to a minimum normal operation temperature.

10 . The integrated circuit device as claimed in claim 9 , wherein said minimum normal operation temperature is defined to at least partly compensate for a switching delay caused by a temperature inversion effect encountered at one or more field-effect transistor circuits comprised in said plurality of sequential logic cells.

11 . The integrated circuit device as claimed in claim 9 , wherein said mode controller unit is arranged to switch said integrated circuit device from said first mode into said second mode when a value of said temperature measurement is below said threshold value.

12 . The integrated circuit device as claimed in claim 9 , wherein said temperature sensing unit comprises a second ring oscillator circuit.

13 . A method for self-heating an integrated circuit device, comprising

providing at least one first clock signal, by a first clock signal source;

providing at least one second clock signal, by a second clock signal source;

receiving, in a first mode, said at least one first clock signal or at least one clock signal derived from said at least one first clock signal, by at least one of a plurality of sequential logic cells; and

receiving, in a second mode, said at least one second clock signal or at least one clock signal derived from said at least one second clock signal, by said at least one of said plurality of sequential logic cells; wherein in said second mode said at least one second clock signal is adapted to said at least one of said plurality of sequential logic cells to generate in at least a portion of said integrated circuit device a current consumption when said at least one first clock signal is not a toggling signal.

14 . The method as claimed in claim 13 , comprising

providing a temperature measurement of said integrated circuit device; and

switching said integrated circuit device from said second mode into said first mode when a value of said temperature measurement is above a threshold value corresponding to a minimum normal operation temperature.

Assignments (28)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FILING AND REMOVE APPL. NO. 14085520 REPLACE IT WITH 14086520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Mar 1, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT OF INCORRECT PATENT APPLICATION NUMBER 14085520 ,PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT OF INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037792/0227 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037879/0581 →
CORRECTIVE ASSIGNMENT OF INCORRECT NUMBER 14085520 PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTON OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
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To: MORGAN STANLEY SENIOR FOUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
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CORRECTIVE ASSIGNMENT TO CORRECT THE INVENTOR NAME "NAOM SIVAN" PREVIOUSLY RECORDED ON REEL 031545 FRAME 0767. ASSIGNOR(S) HEREBY CONFIRMS THE INVENTOR NAME IS "NOAM SIVAN". Recorded Feb 6, 2014
From: SOFER, SERGEY; GROISSMAN, MOTY; MELAMED-KOHEN, EYAL; SIVAN, NOAM
To: FREESCALE SEMICONDUCTOR, INC.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2013
From: SOFER, SERGEY; GROISSMAN, MOTY; MELAMED-KOHEN, EYAL; SIVAN, NAOM
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