IP Library › Granted Patent US 9,745,667
Granted Patent B2
US 9,745,667 · App. 14/128,855 · Granted Aug 29, 2017

Method of fabricating wafer

Inventors: Seok Min Kang (Seoul, KR); Moo Seong Kim (Seoul, KR)
Assignee: LG INNOTEK CO., LTD.
C30B25/16C23C16/463C30B33/00C30B33/02H01L21/0262H01L21/02378H01L21/02433H01L21/02532H01L21/02664H01L21/324
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Quick Facts
Patent No.
US 9,745,667
App. No.
14/128,855
Granted
Aug 29, 2017
Kind
B2
Abstract

A method of fabricating a wafer according to the embodiment comprises the steps of growing an wafer on a surface of the wafer in a growth temperature; and cooling the wafer after the wafer has been grown, wherein a stepwise cooling is performed when cooling the wafer.

Claims (32)

1. A method of fabricating a wafer, the method comprising:

growing a single crystal layer on a surface of the wafer at a growth temperature;

cooling the wafer after the single crystal layer has been grown; and

annealing the wafer,

wherein the annealing of the wafer is performed at a temperature corresponding to or lower than the growth temperature,

wherein the growing of the single crystal layer and the annealing of the wafer are performed in the same chamber in situ, and

wherein the wafer is cut at an angle of 4° or 8°.

2. The method of claim 1 , wherein the annealing of the wafer is performed at a temperature of 800° C. to 1800° C.

3. The method of claim 1 , wherein the annealing of the wafer is performed for 1 hour or more.

4. The method of claim 1 , wherein the cooling of the wafer comprises:

a first cooling of the wafer after the wafer has been grown; and

a second cooling of the wafer after the wafer has been annealed.

5. The method of claim 4 , wherein a stepwise cooling is performed in the second cooling of the wafer.

6. A method of fabricating a wafer, the method comprising:

growing a single crystal layer on a surface of the wafer at a growth temperature;

annealing the wafer after the single crystal layer has been grown; and

cooling the wafer after the wafer has been annealed,

wherein the annealing of the wafer is performed at a temperature higher than the growth temperature,

wherein the growing of the single crystal layer and the annealing of the wafer are performed in the same chamber in situ, and

wherein the wafer is cut at an angle of 4° or 8°.

7. The method of claim 6 , wherein the annealing of the wafer is performed at a temperature higher than the growth temperature by 100° C. to 200° C.

8. The method of claim 6 , wherein the cooling of the wafer comprises cooling the wafer until a first temperature is reached, maintaining the wafer at the first temperature, cooling the wafer until a second temperature lower than the first temperature is reached, maintaining the wafer at the second temperature, cooling the wafer until a third temperature lower than the second temperature is reached, maintaining the wafer at the third temperature, cooling the wafer until a fourth temperature lower than the third temperature is reached, and maintaining the wafer at the fourth temperature.

9. The method of claim 8 , wherein the fourth temperature corresponds to the growth temperature.

10. The method of claim 6 , wherein a stepwise cooling is performed in the cooling of the wafer until a temperature becomes equal to or lower than the growth temperature.

11. The method of claim 8 , wherein the cooling of the wafer further comprises cooling the wafer until a fifth temperature lower than the fourth temperature is reached, maintaining the wafer at the fifth temperature, cooling the wafer until a sixth temperature lower than the fifth temperature is reached, and maintaining the wafer at the sixth temperature.

12. The method of claim 6 , wherein the annealing of the wafer is performed at a temperature of 800° C. to 1800° C.

13. The method of claim 1 , wherein the wafer includes silicon carbide.

14. The method of claim 1 , wherein the annealing is performed under a vacuum condition.

15. The method of claim 11 , wherein the stepwise cooling is performed at a rate of 0.1° C./hour to 10° C./hour.

16. The method of claim 6 , wherein the wafer includes silicon carbide.

17. The method of claim 6 , wherein the annealing is performed under a vacuum condition.

18. The method of claim 10 , wherein the stepwise cooling is performed at a rate of 0.1° C./hour to 10° C./hour.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2021
From: LG INNOTEK CO., LTD.
To: LX SEMICON CO., LTD.
Reel/Frame 057875/0011 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2016
From: KANG, SEOK MIN; KIM, MOO SEONG
To: LG INNOTEK CO., LTD.
Reel/Frame 039178/0284 →
Priority Claims (5)
KR 10-2011-0060906 · Jun 22, 2011 · national
KR 10-2011-0060907 · Jun 22, 2011 · national
KR 10-2011-0060910 · Jun 22, 2011 · national
KR 10-2011-0060912 · Jun 22, 2011 · national
KR 10-2011-0060913 · Jun 22, 2011 · national
Continuity (1)
Related Publication 20140137793A1 · May 22, 2014