IP Library Granted Patent US 9,794,575
Granted Patent B2
US 9,794,575 · App. 14/133,261 · Granted Oct 17, 2017

Apparatuses and methods for optimizing rate-distortion costs in video encoding

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Quick Facts
Patent No.
US 9,794,575
App. No.
14/133,261
Granted
Oct 17, 2017
Kind
B2
Abstract

Apparatuses and methods for optimizing rate-distortion costs of a signal are disclosed. An apparatus may include an encoder. The encoder may be configured to receive a video signal and provide a residual indicative of a difference between the video signal and a reconstructed video signal. The encoder may further be configured to perform a transform on the residual to provide a plurality of transform coefficients and rate-distortion optimize the plurality of transform coefficients in accordance with an HEVC state transition scheme to provide a rate-distortion optimized plurality of quantized coefficients. The encoder may further be configured to encode the plurality of quantized coefficients in accordance with context-adaptive binary arithmetic coding.

Claims (25)

1. An encoder, comprising:

a memory; and

a processor configured to receive a video signal and provide a residual indicative of a difference between the video signal and a reconstructed video signal,

the processor further configured to perform a transform on the residual to provide a plurality of transform coefficients and rate-distortion optimize the plurality of transform coefficients in accordance with an HEVC state transition scheme to provide a rate-distortion optimized plurality of quantized coefficients,

the processor further configured to encode the plurality of quantized coefficients in accordance with context-adaptive binary arithmetic coding,

wherein each of the rate-distortion optimized plurality of quantized coefficients is associated with a respective plurality of candidate coefficients,

wherein a respective arc is associated with each of the plurality of candidate coefficients, the respective arc comprising at least three of context, cost, distortion cost, rate cost, state, or path parameters.

2. The encoder according to claim 1 wherein the processor is further configured to rate-distortion optimize the plurality of transform coefficients by employing dynamic programming.

3. The encoder of claim 2 , wherein the processor is further configured to employ dynamic programming using a trellis configured in accordance with the HEVC state transition scheme.

4. The encoder of claim 1 , wherein the transform comprises a discrete cosine transform.

5. The encoder of claim 1 , wherein the processor is further configured to rate-distortion optimize the plurality of quantized coefficients using an inverse Lagrangian cost function.

6. A method, comprising:

providing a residual indicative of a difference between a predicted video signal and a reconstructed video signal;

performing a transform on the residual to provide a plurality of transform coefficients;

rate-distortion optimizing the plurality of transform coefficients based on an HEVC state transition scheme to provide a plurality of rate-distortion optimized coefficients, wherein the rate-distortion optimizing further comprises:

generating a plurality of candidates,

generating a respective arc for each of the plurality of candidates, the respective arc comprising at least three of context, cost, distortion cost, rate cost, state, or path parameters, and

determining which of the respective arcs has a lowest cost; and

encoding the plurality of rate-distortion optimized coefficients in accordance with context-adaptive binary arithmetic coding to provide an encoded bitstream.

7. The method of claim 6 , further comprising:

performing a scan operation on the plurality of transform coefficients to provide a coefficient vector.

8. The method of claim 6 , wherein rate-distortion optimizing the plurality of transform coefficients includes clamping the number of bits used to represent a distortion cost.

9. The method of claim 6 , wherein encoding the plurality of rate-distortion optimized coefficients comprises encoding at a fixed rate.

10. The method of claim 6 , further comprising generating a plurality of distortion costs based on an inverse Lagrangian cost function.

11. The method of claim 6 , wherein generating the respective arc for each of the plurality of candidates comprises estimating a rate using an estimation table.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2017
From: MAGNUM SEMICONDUCTOR, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 043207/0637 →
RELEASE OF SECURITY INTEREST Recorded Apr 5, 2017
From: SILICON VALLEY BANK
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 042166/0405 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2016
From: CAPITAL IP INVESTMENT PARTNERS LLC
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 038440/0565 →
SECURITY AGREEMENT Recorded Apr 6, 2016
From: MAGNUM SEMICONDUCTOR, INC.
To: SILICON VALLEY BANK
Reel/Frame 038366/0098 →
SHORT-FORM PATENT SECURITY AGREEMENT Recorded Oct 31, 2014
From: MAGNUM SEMICONDUCTOR, INC.
To: CAPITAL IP INVESTMENT PARTNERS LLC, AS ADMINISTRATIVE AGENT
Reel/Frame 034114/0102 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2013
From: PEARSON, ERIC C.
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 031813/0011 →