IP Library › Granted Patent US 9,366,890
Granted Patent B2
US 9,366,890 · App. 14/139,188 · Granted Jun 14, 2016

Liquid crystal display

Inventors: Duk-Sung Kim (Asan-si, KR); Bong-Jun Lee (Seoul, KR); Sung Man Kim (Seoul, KR); Seul Ki Kim (Anyang-si, KR); Jin Yun Kim (Asan-si, KR); Dong Wuuk Seo (Asan-si, KR); Min Hee Son (Anyang-si, KR)
Assignee: Samsung Display Co., Ltd.
G02F1/13306G02F1/1343G02F1/134309G02F1/134363G02F2001/134318G02F2001/134372G02F2001/136272
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Quick Facts
Patent No.
US 9,366,890
App. No.
14/139,188
Granted
Jun 14, 2016
Kind
B2
Abstract

A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Claims (69)

1. A liquid crystal display, comprising:

a substrate;

first signal lines disposed on the substrate, the first signal lines longitudinally extending in substantially a first direction;

a gate insulating layer disposed on the first signal lines;

a first electrode disposed on the gate insulating layer;

a thin film transistor connected to a first signal line of the first signal lines, the thin film transistor comprising the gate insulating layer and the first electrode;

a pixel electrode longitudinally extending in substantially the first direction, the pixel electrode being connected to the thin film transistor and configured to receive a data voltage from the thin film transistor;

a common electrode overlapping with at least a portion of the pixel electrode;

common voltage lines longitudinally extending substantially parallel to the first signal line, the common voltage lines being disposed on the same layer as the first signal line; and

a first insulating layer disposed between the pixel electrode and the common electrode,

wherein:

one of the pixel electrode and the common electrode has a planar shape and the other comprises branch electrodes overlapping with at least a portion of the planar-shaped electrode,

the branch electrodes extend substantially parallel to the first signal line,

at least a portion of the common electrode overlaps with at least a portion of the first signal line, and

the common electrode is connected to a first common voltage line of the common voltage lines.

2. The liquid crystal display of claim 1 , wherein:

at least the portion of the common electrode overlapping with at least the portion of the first signal line comprises an opening extending along at least the portion of the first signal line.

3. The liquid crystal display of claim 2 , wherein:

the first signal line comprises a gate line configured to transmit a gate signal to the thin film transistor.

4. The liquid crystal display of claim 3 , further comprising:

data lines disposed on the gate insulating layer, the data lines intersecting the gate line,

wherein the first electrode is connected to a first data line of the data lines, and

wherein the thin film transistor further comprises:

a second electrode facing the first electrode, the second electrode being connected to the pixel electrode, and

a semiconductor overlapping with at least a portion of the first electrode and the second electrode.

5. The liquid crystal display of claim 4 , wherein:

the first signal lines and the common voltage lines are alternately arranged in a second direction different from the first direction.

6. The liquid crystal display of claim 5 , wherein:

pixel electrodes in a row of pixels arranged in the second direction are alternately connected to a first data line of the data lines and a second data line of the data lines; and

the first and second data lines are configured to transmit data voltages of opposite polarities.

7. The liquid crystal display of claim 6 , further comprising:

a second insulating layer disposed between the first signal line and the common electrode,

wherein the second insulating layer does not comprise an organic insulating material.

8. The liquid crystal display of claim 2 , wherein:

the first signal line comprises a data line configured to transmit a data signal to the thin film transistor.

9. The liquid crystal display of claim 8 , further comprising:

a gate line disposed on the gate insulating layer, the gate line being connected to the first electrode and intersecting the data line,

wherein the thin film transistor further comprises:

a source electrode connected to the data line,

a drain electrode facing the source electrode, and

a semiconductor disposed on respective portions of the source electrode and the drain electrode.

10. The liquid crystal display of claim 9 , further comprising:

a second insulating layer disposed between the first signal line and the common electrode,

wherein the second insulating layer does not comprise an organic insulating material.

11. The liquid crystal display of claim 9 , wherein:

the semiconductor comprises an oxide semiconductor.

12. The liquid crystal display of claim 1 , wherein:

the first signal line comprises a gate line configured to transmit a gate signal to the thin film transistor.

13. The liquid crystal display of claim 12 , further comprising:

data lines disposed on the gate insulating layer, the data lines intersecting the gate line,

wherein the first electrode is connected to a first data line of the data lines, and

wherein the thin film transistor further comprises:

a second electrode facing the first electrode, the second electrode being connected to the pixel electrode, and

a semiconductor disposed on respective portions of the first electrode and the second electrode.

14. The liquid crystal display of claim 13 , wherein:

the first signal lines and the common voltage lines are alternately arranged in a second direction different from the first direction.

15. The liquid crystal display of claim 14 , wherein:

pixel electrodes in a row of pixels arranged in the second direction are alternately connected to a first data line of the data lines and a second data line of the data lines; and

the first and second data lines are configured to transmit data voltages of opposite polarities.

16. The liquid crystal display of claim 1 , wherein:

the first signal lines and the common voltage lines are alternately arranged in a second direction different from the first direction.

17. The liquid crystal display of claim 1 , wherein:

the first signal line comprises a data line configured to transmit a data signal to the thin film transistor.

18. The liquid crystal display of claim 17 , further comprising:

a gate line disposed on the gate insulating layer, the gate line being connected to the first electrode and intersecting the data line,

wherein the thin film transistor further comprises:

a source electrode connected to the data line,

a drain electrode facing the source electrode, and

a semiconductor disposed on respective portions of the source electrode and the drain electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2013
From: KIM, DUK-SUNG; LEE, BONG-JUN; KIM, SUNG MAN; KIM, SEUL KI; KIM, JIN YUN; SEO, DONG WUUK; SON, MIN HEE
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 031842/0669 →
Priority Claims (1)
KR 10-2013-0014968 · Feb 12, 2013 · national
Continuity (1)
Related Publication 20140226100A1 · Aug 14, 2014