IP Library Granted Patent US 9,277,653
Granted Patent B2
US 9,277,653 · App. 14/152,096 · Granted Mar 1, 2016

Through-hole-vias in multi-layer printed circuit boards

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,277,653
App. No.
14/152,096
Granted
Mar 1, 2016
Kind
B2
Abstract

Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of manufacturing a PCB. Embodiments include depositing upon layers of laminate printed circuit traces and joining the layers of laminate. Embodiments also include drilling at least one via hole through the layers of laminate and placing in the via hole a via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a second metal having a conductivity lower than the conductivity of copper.

Claims (16)

1. A method of manufacturing a multi-layer printed circuit board (PCB) comprising:

depositing upon layers of laminate printed circuit traces;

joining the layers of laminate;

drilling at least one via hole through the layers of laminate;

placing in the via hole a via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a second metal having a conductivity lower than the conductivity of copper;

wherein both the used portion and the unused portion of the via conductor comprise copper, and

only the unused portion of the via conductor is coated with a metal having a conductivity lower than the conductivity of copper.

2. The method of claim 1 further comprising:

forming the used portion of the via conductor so as to conduct an alternating current signal from a trace on one layer of the PCB to a trace on another layer of the PCB,

the alternating current signal characterized by a frequency high enough to demonstrate skin effect, moving the alternating current toward the surface of the via conductor.

3. The method of claim 1 further comprising:

forming the unused portion of the via conductor with no connection to any further trace,

the unused portion of the via conductor implementing a resonant stub effecting an insertion loss of the alternating current signal centered on a resonant frequency,

the metal having a conductivity lower than the conductivity of copper increasing resistive dampening of resonance and reducing the insertion loss.

4. The method of claim 1 wherein the metal having a conductivity lower than the conductivity of copper is iron.

5. The method of claim 1 wherein the metal having a conductivity lower than the conductivity of copper is nickel.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2019
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 050301/0033 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2016
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 038483/0940 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
Reel/Frame 034194/0111 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2014
From: CASES, MOISES; KIM, TAE HONG; MANDREKAR, ROHAN U.; SHERALI, NUSRAT I.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 031938/0163 →