Semiconductor device and manufacturing method thereof
An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
1. A semiconductor device comprising:
a gate electrode layer;
a gate insulating layer;
an oxide semiconductor layer comprising a channel formation region adjacent to the gate electrode layer with the gate insulating layer therebetween; and
source and drain electrode layers in electrical contact with the oxide semiconductor layer,
wherein the oxide semiconductor layer comprising a crystalline region including crystals with a grain diameter greater than or equal to 1 nm and less than or equal to 20 nm, and
wherein c-axes of the crystals are oriented in a direction perpendicular to a surface of the oxide semiconductor layer.
2. The semiconductor device according to claim 1 ,
wherein each of the gate electrode layer and the source and drain electrode layers is a conductive layer having a light transmitting property.
3. The semiconductor device according to claim 1 ,
wherein the gate electrode layer is located over the oxide semiconductor layer.
4. The semiconductor device according to claim 1 ,
wherein the gate electrode layer is located under the oxide semiconductor layer.
5. The semiconductor device according to claim 1 ,
wherein the oxide semiconductor layer comprises gallium and zinc.
6. The semiconductor device according to claim 1 ,
wherein the source and drain electrode layers comprise titanium, and
wherein the semiconductor device further comprising a titanium oxide layer between the oxide semiconductor layer and at least one of the source and drain electrode layers.
7. The semiconductor device according to claim 1 ,
wherein the source and drain electrode layers comprise an element selected from chromium, tantalum, titanium, molybdenum, tungsten, and a combination thereof.
8. The semiconductor device according to claim 1 ,
wherein a donor concentration of the channel formation region is lower than or equal to 1×10 18 /cm 3 .
9. A semiconductor device comprising:
a gate electrode layer;
a gate insulating layer;
an oxide semiconductor layer comprising a channel formation region adjacent to the gate electrode layer with the gate insulating layer therebetween, and
source and drain electrode layers in electrical contact with the oxide semiconductor layer;
wherein the oxide semiconductor layer comprises a first crystalline region including crystals whose c-axes are oriented in a direction perpendicular to a surface of the oxide semiconductor layer in a superficial portion of the oxide semiconductor layer and a second crystalline region including microcrystals, and
wherein a grain diameter of the crystals in the first crystalline region is greater than or equal to 1 nm and less than or equal to 20 nm.
10. The semiconductor device according to claim 9 ,
wherein each of the gate electrode layer and the source and drain electrode layers is a conductive layer having a light transmitting property.
11. The semiconductor device according to claim 9 ,
wherein the gate electrode layer is located over the oxide semiconductor layer.
12. The semiconductor device according to claim 9 ,
wherein the gate electrode layer is located under the oxide semiconductor layer.
13. The semiconductor device according to claim 9 ,
wherein the oxide semiconductor layer comprises gallium and zinc.
14. The semiconductor device according to claim 9 ,
wherein the source and drain electrode layers comprise titanium, and
wherein the semiconductor device further comprising a titanium oxide layer between the oxide semiconductor layer and at least one of the source and drain electrode layers.
15. The semiconductor device according to claim 9 ,
wherein the source and drain electrode layers comprise an element selected from chromium, tantalum, titanium, molybdenum, tungsten, and a combination thereof.
16. The semiconductor device according to claim 9 ,
wherein a donor concentration of the channel formation region is lower than or equal to 1×10 18 /cm 3 .
17. A display device comprising:
a pixel portion including a first transistor over a substrate,
wherein the first transistor comprises:
a first gate electrode layer;
a first gate insulating layer;
a first oxide semiconductor layer comprising a channel formation region adjacent to the first gate electrode layer with the first gate insulating layer therebetween; and
first source and drain electrode layers in electrical contact with the first oxide semiconductor layer,
wherein the first oxide semiconductor layer comprising a crystalline region with a grain diameter greater than or equal to 1 nm and less than or equal to 20 nm, and
wherein the crystalline region in the first oxide semiconductor layer includes crystals whose c-axes are oriented in a direction perpendicular to a surface of the first oxide semiconductor layer.
18. The display device according to claim 17 ,
wherein each of the first gate electrode layer and the first source and drain electrode layers is a conductive layer having a light transmitting property.
19. The display device according to claim 17 , further comprising:
a driver circuit portion including a second transistor over the substrate,
wherein the second transistor comprises:
a second gate electrode layer;
a second gate insulating layer;
a second oxide semiconductor layer comprising a channel formation region adjacent to the second gate electrode layer with the second gate insulating layer therebetween; and
second source and drain electrode layers in electrical contact with the second oxide semiconductor layer,
wherein the second oxide semiconductor layer comprising a crystalline region with a grain diameter greater than or equal to 1 nm and less than or equal to 20 nm, and
wherein the crystalline region in the second oxide semiconductor layer includes crystals whose c-axes are oriented in a direction perpendicular to a surface of the second oxide semiconductor layer.
20. The display device according to claim 19 ,
wherein the first gate electrode layer is located under the first oxide semiconductor layer, and
wherein the second gate electrode layer is located over the second oxide semiconductor layer.