IP Library Granted Patent US 9,018,634
Granted Patent B2
US 9,018,634 · App. 14/165,405 · Granted Apr 28, 2015

Semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,018,634
App. No.
14/165,405
Granted
Apr 28, 2015
Kind
B2
Abstract

A semiconductor device includes a field effect transistor that has a first nitride semiconductor layer and a second nitride semiconductor layer larger in bandgap than the first nitride semiconductor layer formed on a substrate in this order and a gate electrode, a source electrode, and a drain electrode, and uses two-dimensional electron gas formed at the interface between the first and second nitride semiconductor layers as the channel. The field effect transistor further has a p-type nitride semiconductor layer formed between the gate electrode and the drain electrode and electrically connected to the drain electrode.

Claims (18)

1. A semiconductor device comprising a field effect transistor, the transistor having a first nitride semiconductor layer formed on a substrate, a second nitride semiconductor layer larger in bandgap than the first nitride semiconductor layer formed on the first nitride semiconductor layer, a gate electrode formed on the second nitride semiconductor layer, and a source electrode and a drain electrode formed to sandwich the gate electrode each being in contact with at least the second nitride semiconductor layer, the transistor using two-dimensional electron gas formed at an interface between the first nitride semiconductor layer and the second nitride semiconductor layer as a channel,

wherein the field effect transistor further has a p-type nitride semiconductor layer formed on the second nitride semiconductor layer at a position between the gate electrode and the drain electrode and electrically connected to the drain electrode, and

an n-type nitride semiconductor layer is formed between the p-type nitride semiconductor layer and the first nitride semiconductor layer.

2. The semiconductor device of claim 1 , wherein the n-type nitride semiconductor layer is formed in a region inside the second nitride semiconductor layer or on the second nitride semiconductor layer located right under the p-type nitride semiconductor layer.

3. The semiconductor device of claim 1 , wherein

the n-type nitride semiconductor layer is formed inside the second nitride semiconductor layer, and

the n-type impurity concentration of the n-type nitride semiconductor layer is higher than the n-type impurity concentration of the second nitride semiconductor layer excluding the region of the n-type nitride semiconductor layer.

4. The semiconductor device of claim 1 , wherein the hole carrier concentration of the p-type nitride semiconductor layer is larger than the electron carrier concentration of the n-type nitride semiconductor layer.

5. The semiconductor device of claim 1 , wherein the n-type nitride semiconductor layer is formed inside the second nitride semiconductor layer, extending from underneath the p-type nitride semiconductor layer to a position in contact with the source electrode and to a position in contact with the drain electrode.

6. The semiconductor device of claim 1 , wherein the field effect transistor further has an electrode connecting the p-type nitride semiconductor layer to the drain electrode.

7. The semiconductor device of claim 1 , wherein

the p-type nitride semiconductor layer is placed apart from the drain electrode, and

the distance between the p-type nitride semiconductor layer and the gate electrode is larger than the distance between the p-type nitride semiconductor layer and the drain electrode.

8. The semiconductor device of claim 1 , wherein

the first nitride semiconductor layer is made of GaN, and

the second nitride semiconductor layer is made of AlGaN.

9. The semiconductor device of claim 1 , wherein the p-type nitride semiconductor layer is made of p-type GaN.

10. The semiconductor device of claim 1 , wherein the p-type impurity concentrations of the first nitride semiconductor layer and the second nitride semiconductor layer are both lower than the p-type impurity concentration of the p-type nitride semiconductor layer.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2025
From: INFINEON TECHNOLOGIES AUSTRIA AG
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 072853/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2024
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 069503/0625 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2014
From: TANAKA, KENICHIRO; UEDA, TETSUZO
To: PANASONIC CORPORATION
Reel/Frame 032873/0505 →