Signal generation circuit
A signal generation circuit includes a limiter and a mixer. The limiter receives an input signal, allows the input signal to be off a scale at a limit voltage, and generates a phase signal indicating a phase component of the input signal. The mixer receives the input signal and the phase signal, and generates an amplitude signal indicating an amplitude component of the input signal.
1. A signal generation circuit comprising:
a limiter configured to receive an input signal, allow the input signal to be off a scale at a limit voltage, and generate a phase signal indicating a phase component of the input signal;
a mixer configured to receive the input signal and the phase signal, and generate an amplitude signal indicating an amplitude component of the input signal;
a replica mixer configured to generate a replica offset voltage equivalent to an offset voltage of the mixer, the replica mixer having a configuration corresponding to the mixer; and
a subtractor configured to subtract the replica offset voltage from the amplitude signal.
2. The signal generation circuit according to claim 1 , wherein the mixer is further configured to generate the amplitude signal by multiplying the input signal and the phase signal.
3. The signal generation circuit according to claim 1 , wherein the replica mixer is further configured to generate the replica offset voltage by multiplying a fixed input voltage and the phase signal.
4. The signal generation circuit according to claim 3 , wherein the fixed input voltage comprises a power supply voltage, a grounding voltage or a predetermined bias voltage.
5. The signal generation circuit according to claim 1 , further comprising:
a low-pass filter configured to reduce high frequency components in the amplitude signal.
6. The signal generation circuit according to claim 5 , wherein the low-pass filter is disposed in an output stage of the mixer.
7. The signal generation circuit according to claim 5 , wherein the low-pass filter is disposed in an output stage of the subtractor.
8. The signal generation circuit according to claim 5 , wherein the low-pass filter includes:
a first low-pass filter in an output stage of the mixer; and
a second low-pass filter in an output stage of the replica mixer.
9. A signal generation circuit comprising:
a limiter configured to receive an input signal, allow the input signal to be off a scale at a limit voltage, and generate a phase signal indicating a phase component of the input signal;
a mixer configured to receive the input signal and the phase signal, and generate an amplitude signal indicating an amplitude component of the input signal; and
a buffer in a preceding stage of the mixer.
10. The signal generation circuit according to claim 9 , wherein the buffer includes a delay time equivalent to a delay time in the limiter.
11. The signal generation circuit comprising:
a limiter configured to receive an input signal, allow the input signal to be off a scale at a limit voltage, and generate a phase signal indicating a phase component of the input signal; and
a mixer configured to receive the input signal and the phase signal, and generate an amplitude signal indicating an amplitude component of the input signal, wherein:
the input signal is a differential signal;
the phase signal contains positive and negative logic phase signals;
the amplitude signal contains positive and negative logic amplitude signals; and
the mixer includes:
p-channel-type MOS transistors configured to receive the positive and negative logic phase signals at gates to generate the positive logic amplitude signal; and
n-channel-type MOS transistors configured to receive the positive and negative logic phase signals at gates to generate the negative logic amplitude signal.