Building, transmitting, and receiving frame structures in power line communications
Systems and methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols based on a chirp signal that yields a low peak-to-average power ratio (PAPR). According to some techniques, the preamble may be constructed with one or more different types and/or number of symbols configured to identify a PLC domain operating in close physical proximity to another PLC domain. According to other techniques, one or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise. According to yet other techniques, a PLC detector may be capable of receiving and decoding two or more types of PLC frames (e.g., using different PLC standards).
1. A method comprising:
performing, by a power line communication (PLC) device,
identifying a first PLC symbol within a PLC preamble;
inserting an instance of the first PLC symbol at a predetermined location within a PLC header portion of a first PLC frame; identifying a second PLC symbol within the PLC preamble portion of the first PLC frame, the second PLC symbol different from the first PLC symbol; and inserting an instance of the second symbol at another predetermined location within the PLC header portion of the first PLC frame;
causing the first PLC frame to be transmitted over a power line;
receiving a second PLC frame;
locating a position of a PLC preamble symbol within a header portion of the second PLC frame; and
estimating at least one of:
a start of the second PLC frame or
a sampling frequency offset based, at least in part, upon the position.
2. The method of claim 1 , further comprising:
performing, by the PLC device,
inserting another instance of the first PLC symbol at another predetermined location within the PLC header portion of the first PLC frame.
3. The method of claim 1 , wherein the PLC device is a PLC modem.
4. The method of claim 1 , wherein the PLC device is a gateway.
5. The method of claim 1 , wherein the PLC device is a PLC data concentrator.
6. The method of claim 1 , wherein the PLC device is implemented at least in part as an integrated circuit (IC).
7. The method of claim 6 , wherein the IC is a digital signal processor (DSP).
8. The method of claim 6 , wherein the IC is an application specific integrated circuit (ASIC).
9. The method of claim 6 , wherein the IC is a system on a Chip (SoC) circuit.
10. The method of claim 6 , wherein the IC is a field programmable gate array (FPGA).
11. The method of claim 6 , wherein the IC is a microprocessor.
12. The method of claim 6 , wherein the IC is a microcontroller.