IP Library Granted Patent US 9,661,339
Granted Patent B2
US 9,661,339 · App. 14/174,183 · Granted May 23, 2017

Multi-core architecture for low latency video decoder

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,661,339
App. No.
14/174,183
Granted
May 23, 2017
Kind
B2
Abstract

An apparatus having first, second and third processors of a multi-core processor is disclosed. The first processor is configured to perform one or more first operations in a decoding of a plurality of macroblocks of video in a bitstream. The second processor (i) operates as a slave to the first processor and (ii) is configured to perform one or more second operations in the decoding of the macroblocks. The third processor (i) operates as a slave to the second processor and (ii) is configured to perform one or more third operations in the decoding of the macroblocks.

Claims (39)

1. A decoder apparatus comprising:

a first processor of a multi-core processor configured to perform one or more first decoding operations in a decoding of a plurality of macroblocks of video in a bitstream;

a second processor of said multi-core processor operating as a slave to said first processor and configured to perform one or more second decoding operations in said decoding of said macroblocks; and

a third processor of said multi-core processor operating as a slave to said second processor and configured to perform one or more third decoding operations in said decoding of said macroblocks, wherein the first, second, and third processors are configured to operate in parallel during a first time slot on a first macroblock, a second macroblock, and a third macroblock of said macroblocks, respectively, wherein the second macroblock was previously operated on by the first processor in a second time slot prior to the first time slot, and the third macroblock was previously operated on by the first processor in a third time slot prior to the second time slot and by the second processor in the second time slot.

2. The decoder apparatus according to claim 1 , wherein the first decoding operations comprise slice header parsing and entropy decoding, the second decoding operations comprise one of inter prediction or intra prediction, inverse quantization, and inverse transformation, and the third decoding operations comprise deblock filtering.

3. The decoder apparatus according to claim 1 , wherein the second time slot is immediately prior to the first time slot and the third time slot is immediately prior to the second time slot.

4. The decoder apparatus according to claim 1 ,

wherein the plurality of macroblocks correspond to a first slice of the video, wherein the first slice is a P- or B-slice, wherein, in response to the first slice being a P- or B-slice, the first processor is configured to perform slice header parsing and entropy decoding for the first slice, the second processor is configured to perform inter prediction or intra prediction, inverse quantization, and inverse transformation for the first slice, and the third processor is configured to perform deblock filter strength calculations and deblock filtering for the first slice,

wherein the bitstream further comprises a second plurality of macroblocks corresponding to a second slice of the video, wherein the second slice is an I-slice, and wherein, in response to the second slice being an I-slice, the first processor is configured to perform slice header parsing and entropy decoding for the second slice, the second processor is configured to perform inter prediction or intra prediction, inverse quantization, and inverse transformation for the second slice, the third processor is configured to perform deblock filter strength calculations for the second slice, and a fourth processor of said multi-core processor is configured to perform deblock filtering for the second slice.

5. The decoder apparatus according to claim 1 ,

wherein the plurality of macroblocks correspond to a low filter loading situation, wherein, in response to the low filter loading situation, the first processor is configured to perform slice header parsing and entropy decoding for the plurality of macroblocks, the second processor is configured to perform inter prediction or intra prediction, inverse quantization, and inverse transformation for the plurality of macroblocks, and the third processor is configured to perform deblock filter strength calculations, luma deblock filtering, and chroma deblock filtering for the plurality of macroblocks,

wherein the bitstream further comprises a second plurality of macroblocks corresponding to a moderate filter loading situation, wherein, in response to the moderate filter loading situation, the first processor is configured to perform slice header parsing and entropy decoding for the second plurality of macroblocks, the second processor is configured to perform inter prediction or intra prediction, inverse quantization, and inverse transformation for the second plurality of macroblocks, the third processor is configured to perform deblock filter strength calculations for the second plurality of macroblocks, a fourth processor of said multi-core processor is configured to perform luma deblock filtering and chroma deblock filtering for the second plurality of macroblocks,

wherein the bitstream further comprises a third plurality of macroblocks corresponding to a high filter loading situation, wherein, in response to the high filter loading situation, the first processor is configured to perform slice header parsing and entropy decoding for the third plurality of macroblocks, the second processor is configured to perform inter prediction or intra prediction, inverse quantization, and inverse transformation for the third plurality of macroblocks, the third processor is configured to perform deblock filter strength calculations for the third plurality of macroblocks, the fourth processor is configured to perform luma deblock filtering for the third plurality of macroblocks, and a fifth processor of said multi-core processor is configured to perform chroma deblock filtering for the third plurality of macroblocks.

6. The decoder apparatus according to claim 1 , wherein said first processor is configured to operate on a fourth group of said macroblocks for a duration of a fourth time slot, said second processor is configured to operate on a fifth group of said macroblocks in parallel with said first processor operating on said fourth group during the fourth time slot and to continue to operate on the fifth group of said macroblocks during a fifth time slot, and said fourth group has fewer of said macroblocks than said fifth group.

7. The decoder apparatus according to claim 1 , further comprising one or more additional cores of said multi-core processor configured to decode a slice in said bitstream, wherein said one or more additional cores are to decode said slice in parallel with said first processor, said second processor, and said third processor to decode another slice in said bitstream.

8. The decoder apparatus according to claim 1 , further comprising a fourth processor of said multi-core processor operating as a slave to said third processor and configured to perform one or more fourth decoding operations in said decoding of said macroblocks, wherein said fourth decoding operations comprise at least one of a picture resolution resizing or a color conversion.

9. The decoder apparatus according to claim 1 , wherein said apparatus is implemented as one integrated circuit.

10. A method for multi-core low latency video decoding comprising:

performing one or more first decoding operations in a decoding of a plurality of macroblocks of video in a bitstream using a first processor of a multi-core processor;

performing one or more second decoding operations in said decoding of said macroblocks using a second processor of said multi-core processor operating as a slave to said first processor; and

performing one or more third decoding operations in said decoding of said macroblocks using a third processor of said multi-core processor operating as a slave to said second processor, wherein the first, second, and third processors operate in parallel during a first time slot on a first macroblock, a second macroblock, and a third macroblock of said macroblocks, respectively, wherein the second macroblock was previously operated on by the first processor in a second time slot prior to the first time slot, and the third macroblock was previously operated on by the first processor in a third time slot prior to the second time slot and by the second processor in the second time slot.

11. The method according to claim 10 , wherein the first decoding operations comprise slice header parsing and entropy decoding, the second decoding operations comprise one of inter prediction or intra prediction, inverse quantization, and inverse transformation, and the third decoding operations comprise deblock filtering.

12. The method according to claim 10 , wherein the plurality of macroblocks correspond to a first slice of the video, wherein the first slice is a P- or B-slice, wherein, in response to the first slice being a P- or B-slice, the first processor performs slice header parsing and entropy decoding for the first slice, the second processor performs inter prediction or intra prediction, inverse quantization, and inverse transformation for the first slice, and the third processor performs deblock filter strength calculations and deblock filtering for the first slice, wherein the bitstream further comprises a second plurality of macroblocks corresponding to a second slice of the video, wherein the second slice is an I-slice, the method further comprising:

in response to the second slice being an I-slice, the first processor performing slice header parsing and entropy decoding for the second slice, the second processor performing inter prediction or intra prediction, inverse quantization, and inverse transformation for the second slice, the third processor performing deblock filter strength calculations for the second slice, and a fourth processor of said multi-core processor performing deblock filtering for the second slice.

13. The method according to claim 10 , wherein the plurality of macroblocks correspond to a low filter loading situation, wherein, in response to the low filter loading situation, the first processor performs slice header parsing and entropy decoding for the plurality of macroblocks, the second processor performs inter prediction or intra prediction, inverse quantization, and inverse transformation for the plurality of macroblocks, and the third processor performs deblock filter strength calculations, luma deblock filtering, and chroma deblock filtering for the plurality of macroblocks, wherein the bitstream further comprises a second plurality of macroblocks corresponding to a moderate filter loading situation and a third plurality of macroblocks corresponding to a high filter loading situation, the method further comprising:

in response to the moderate filter loading situation, the first processor performing slice header parsing and entropy decoding for the second plurality of macroblocks, the second processor performing inter prediction or intra prediction, inverse quantization, and inverse transformation for the second plurality of macroblocks, the third processor performing deblock filter strength calculations for the second plurality of macroblocks, a fourth processor of said multi-core processor performing luma deblock filtering and chroma deblock filtering for the second plurality of macroblocks; and

in response to the high filter loading situation, the first processor performing slice header parsing and entropy decoding for the third plurality of macroblocks, the second processor performing inter prediction or intra prediction, inverse quantization, and inverse transformation for the third plurality of macroblocks, the third processor performing deblock filter strength calculations for the third plurality of macroblocks, the fourth processor performing luma deblock filtering for the third plurality of macroblocks, and a fifth processor of said multi-core processor performing chroma deblock filtering for the third plurality of macroblocks.

14. The method according to claim 10 , wherein the second time slot is immediately prior to the first time slot and the third time slot is immediately prior to the second time slot.

15. The method according to claim 10 , wherein said first processor operates on a fourth group of said macroblocks for a duration of a fourth time slot, said second processor operates on a fifth group of said macroblocks in parallel with said first processor operating on said fourth group during the fourth time slot and to continue to operate on the fifth group of said macroblocks during a fifth time slot, and said fourth group has fewer of said macroblocks than said fifth group.

16. The method according to claim 10 , further comprising:

decoding a slice in said bitstream using one or more additional cores of said multi-core processor, wherein said decoding of said slice is performed in parallel with decoding another slice in said bitstream using said first processor, said second processor and said third processor.

17. The method according to claim 10 , further comprising the step of:

performing one or more fourth decoding operations in said decoding of said macroblocks using a fourth processor of said multi-core processor operating as a slave to said third processor, wherein said fourth decoding operations comprise at least one of a picture resolution resizing or a color conversion.

18. An apparatus comprising:

means for performing one or more first decoding operations in a decoding of a plurality of macroblocks of video in a bitstream;

means for performing one or more second decoding operations in said decoding of said macroblocks, said means for performing said second operations operating as a slave to said means for performing said first operations; and

means for performing one or more third decoding operations in said decoding of said macroblocks, said means for performing said third operations operating as a slave to said means for performing said second operations, wherein the means for performing one or more first decoding operations, means for performing one or more second decoding operations, and means for performing one or more third decoding operations are to operate in parallel during a first time slot on a first macroblock, a second macroblock, and a third macroblock of said macroblocks, respectively, wherein the second macroblock was previously operated on by the means for performing one or more first decoding operations in a second time slot prior to the first time slot, and the third macroblock was previously operated on by the means for performing one or more first decoding operations in a third time slot prior to the second time slot and by the means for performing one or more second decoding operations in the second time slot.

19. The apparatus of claim 18 , wherein the first decoding operations comprise slice header parsing and entropy decoding, the second decoding operations comprise one of inter prediction or intra prediction, inverse quantization, and inverse transformation, and the third decoding operations comprise deblock filtering.

20. The apparatus of claim 18 , wherein the plurality of macroblocks correspond to a first slice of the video, wherein the first slice is a P- or B-slice, wherein, in response to the first slice being a P- or B-slice, the means for performing one or more first decoding operations perform slice header parsing and entropy decoding for the first slice, the means for performing one or more second decoding operations perform inter prediction or intra prediction, inverse quantization, and inverse transformation for the first slice, and the means for performing one or more third decoding operations perform deblock filter strength calculations and deblock filtering for the first slice, wherein the bitstream further comprises a second plurality of macroblocks corresponding to a second slice of the video, wherein the second slice is an I-slice, and wherein, in response to the second slice being an I-slice, the means for performing one or more first decoding operations perform slice header parsing and entropy decoding for the second slice, the means for performing one or more second decoding operations perform inter prediction or intra prediction, inverse quantization, and inverse transformation for the second slice, the means for performing one or more third decoding operations perform deblock filter strength calculations for the second slice, and means for performing one or more fourth decoding operations perform deblock filtering for the second slice.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2014
From: TAN, MIZHOU; BARAZESH, BAHMAN
To: LSI CORPORATION
Reel/Frame 032158/0368 →