IP Library Granted Patent US 9,171,882
Granted Patent B2
US 9,171,882 · App. 14/176,721 · Granted Oct 27, 2015

Semiconductor light emitting device and light emitting module

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Quick Facts
Patent No.
US 9,171,882
App. No.
14/176,721
Granted
Oct 27, 2015
Kind
B2
Abstract

According to one embodiment, a semiconductor light emitting device includes a plurality of chips, a first insulating layer provided between the chips, one p-side external terminal, and one n-side external terminal. Each of the chips includes a semiconductor layer, a p-side electrode, and an n-side electrode. Each of the chips is separated from each other. The one p-side external terminal is provided corresponding to one chip on the second face side. The p-side external terminal is electrically connected to the p-side electrode. The one n-side external terminal is provided corresponding to one chip on the second face side. The n-side external terminal is electrically connected to the n-side electrode.

Claims (82)

1. A semiconductor light emitting device comprising:

a plurality of chips, each of the chips including a semiconductor layer having a first face, a second face opposite to the first face, and a light emitting layer, a p-side electrode provided on the second face, and an n-side electrode provided on the second face, each of the chips being separated from each other;

a first insulating layer provided between the plurality of chips;

a first wiring part connected to a p-side electrode of a first chip, the first wiring part having a first p-side external terminal; and

a second wiring part connected to a n-side electrode of a second chip, the second wiring part having an n-side external terminal, wherein

an external terminal connected to a n-side electrode of the first chip is not provided on the first chip, and an external terminal connected to a p-side electrode of the second chip is not provided on the second chip.

2. The device according to claim 1 , wherein

the first insulating layer is provided also on the p-side electrode and the n-side electrode,

the p-side wiring part including the first wiring part is provided on the first insulating layer, and is electrically connected to the p-side electrode, and

the n-side wiring part including the second wiring part is provided on the first insulating layer, and is electrically connected to the n-side electrode.

3. The device according to claim 1 , wherein the first insulating layer includes a resin.

4. The device according to claim 1 , wherein the first insulating layer covers a side face continuing from the first face of the chip.

5. The device according to claim 2 , further comprising a second insulating layer provided between the p-side wiring part and the n-side wiring part.

6. The device according to claim 5 , wherein the second insulating layer covers a periphery of the p-side wiring part and a periphery of the n-side wiring part.

7. The device according to claim 5 , wherein the second insulating layer includes a resin.

8. The device according to claim 2 , wherein

the p-side wiring part has a p-side wiring layer provided on the first insulating layer, and a p-side metal pillar provided on the p-side wiring layer, the p-side metal pillar being thicker than the p-side wiring layer and including the p-side external terminal; and

the n-side wiring part has an n-side wiring layer provided on the first insulating layer, and an n-side metal pillar provided on the n-side wiring layer, the n-side metal pillar being thicker than the n-side wiring layer and including the n-side external terminal.

9. The device according to claim 8 , wherein an area of the n-side wiring layer is broader than an area of the n-side electrode.

10. The device according to claim 2 , wherein the p-side wiring part is connected to the p-side electrode via a plurality of first vias penetrating the first insulating layer.

11. A semiconductor light emitting device comprising:

a plurality of chips, each of the chips including a semiconductor layer having a first face, a second face opposite to the first face, and a light emitting layer, a p-side electrode provided on the second face, and an n-side electrode provided on the second face, each of the chips being separated from each other;

a first insulating layer provided between the chips;

a p-side external terminal continuously provided on the plurality of the chips; and

an n-side external terminal continuously provided on the plurality of the chips.

12. The device according to claim 2 , wherein the n-side wiring part or the p-side wiring part is provided on each of the plurality of chips.

13. The device according to claim 12 , wherein the n-side wiring part and the p-side wiring part are not provided on a region between the chips.

14. The device according to claim 1 , further comprising:

an inorganic insulating film provided on the p-side electrode; and

a metal pillar provided on the inorganic insulating film, wherein the metal pillar has an external terminal provided in the same plane as the first p-side external terminal and the n-side external terminal.

15. The device according to claim 14 , wherein any of the first p-side external terminal, the n-side external terminal and the metal pillar is provided on each of the plurality of chips.

16. The device according to claim 15 , wherein the metal pillar is not provided on a region between the chips.

17. A semiconductor light emitting device comprising:

a plurality of chips, each of the chips including a semiconductor layer having a first face, a second face opposite to the first face, and a light emitting layer, a p-side electrode provided on the second face, and an n-side electrode provided on the second face, each of the chips being separated from each other;

an insulating layer provided on the second face side;

a p-side wiring layer continuously provided on the plurality of the chips via the insulating layer, the p-side wiring layer being electrically connected to the p-side electrode;

an n-side wiring layer continuously provided on the plurality of the chips via the insulating layer, the n-side wiring layer being electrically connected to the n-side electrode;

a p-side external terminal continuously provided on the p-side wiring layer on the plurality of the chips; and

an n-side external terminal continuously provided on the n-side wiring layer on the plurality of the chips.

18. The device according to claim 17 , wherein the insulating layer has an inorganic insulating film being provided between the p-side electrode and the p-side wiring layer and contacting the p-side electrode and the p-side wiring layer, and being provided between the p-side electrode and the n-side wiring layer and contacting the p-side electrode and the n-side wiring layer.

19. A light emitting module comprising:

a mounting substrate having a pad on a mounting face; and

the semiconductor light emitting device according to claim 1 mounted on the mounting face by joining the first p-side external terminal and the n-side external terminal to the pad.

20. The device according to claim 1 , further comprising:

a first wiring layer provided on the first insulating layer, the first wiring layer including a first portion connected to the n-side electrode of the first chip and a second portion connected to a p-side electrode of another chip; and

a second wiring layer provided on the first insulating layer, the second wiring layer including a third portion connected to the p-side electrode of the second chip and a fourth portion connected to an n-side electrode of another chip.

21. The device according to claim 1 , further comprising:

a third wiring part provided on the p-side electrode of another chip,

an inorganic insulating film interposed between the third wiring part and the p-side electrode of the another chip, the third wiring part having a second p-side external terminal, wherein

the n-side electrode of the first chip is electrically connected to the p-side electrode of the second chip via the another chip.

22. The device according to claim 21 , wherein the second wiring part is provided on the p-side electrode of the second chip, the inorganic insulating film is interposed between the second wiring part and the p-side electrode of the second chip.

23. The device according to claim 1 , wherein the second wiring part is provided on the p-side electrode of the second chip, the first insulating layer is interposed between the second wiring part and the p-side electrode of the second chip.

24. The device according to claim 11 , wherein

the first insulating layer is provided also on the p-side electrode and the n-side electrode,

a p-side wiring part including the p-side external terminal is provided on the first insulating layer, and is electrically connected to the p-side electrode, and

an n-side wiring part including the n-side external terminal is provided on the first insulating layer, and is electrically connected to the n-side electrode.

25. The device according to claim 11 , wherein the first insulating layer includes a resin.

26. The device according to claim 11 , wherein the first insulating layer covers a side face continuing from the first face of the chip.

27. The device according to claim 24 , further comprising a second insulating layer provided between the p-side wiring part and the n-side wiring part.

28. The device according to claim 27 , wherein the second insulating layer covers a periphery of the p-side wiring part and a periphery of the n-side wiring part.

29. The device according to claim 27 , wherein the second insulating layer includes a resin.

30. The device according to claim 11 , further comprising a wiring layer provided on the first insulating layer, and connecting the p-side electrode and the n-side electrode between the chips adjacent to each other.

31. The device according to claim 24 , wherein

the p-side wiring part has

a p-side wiring layer provided on the first insulating layer, and

a p-side metal pillar provided on the p-side wiring layer, the p-side metal pillar being thicker than the p-side wiring layer and including the p-side external terminal; and

the n-side wiring part has

an n-side wiring layer provided on the first insulating layer, and

an n-side metal pillar provided on the n-side wiring layer, the n-side metal pillar being thicker than the n-side wiring layer and including the n-side external terminal.

32. The device according to claim 31 , wherein an area of the n-side wiring layer is broader than an area of the n-side electrode.

33. The device according to claim 24 , wherein the p-side wiring part is connected to the p-side electrode via a plurality of first vias penetrating the first insulating layer.

34. The device according to claim 24 , wherein the n-side wiring part or the p-side wiring part is provided on each of the plurality of chips.

35. The device according to claim 34 , wherein the n-side wiring part and the p-side wiring part are not provided on a region between the chips.

36. The device according to claim 11 , further comprising:

an inorganic insulating film provided on the p-side electrode; and

a metal pillar provided on the inorganic insulating film, wherein

the metal pillar has an external terminal provided in the same plane as the p-side external terminal and the n-side external terminal.

37. The device according to claim 36 wherein any of the p-side external terminal, the n-side external terminal and the metal pillar is provided on each of the plurality of chips.

38. The device according to claim 37 , wherein the metal pillar is not provided on a region between the chips.

39. A light emitting module comprising:

a mounting substrate having a pad on a mounting face; and

the semiconductor light emitting device according to claim 11 mounted on the mounting face by joining the p-side external terminal and the n-side external terminal to the pad.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2020
From: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
To: SEOUL SEMICONDUCTOR CO., LTD.
Reel/Frame 052316/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2020
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA ELECTRONIC DEVICES AND STORAGE CORPORATION
Reel/Frame 051691/0442 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2014
From: AKIMOTO, YOSUKE; SUGIZAKI, YOSHIAKI; KOJIMA, AKIHIRO; HIGUCHI, KAZUHITO; NISHIUCHI, HIDEO; OBATA, SUSUMU
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 032185/0260 →