IP Library Granted Patent US 9,852,934
Granted Patent B2
US 9,852,934 · App. 14/181,031 · Granted Dec 26, 2017

Semiconductor wafer transportation

Inventors: Wen-Yao Hsieh (Sanchong, TW); Wen-Kai Hsieh (Hsinchu, TW); Si-Heng Liu (Jhubei, TW); Lin Hung Kai (Hsinchu, TW); Shao-Hao Chiu (Jubei, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L21/67379H01L21/6773H01L21/67733
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,852,934
App. No.
14/181,031
Granted
Dec 26, 2017
Kind
B2
Abstract

A wafer transportation pod includes a body, a main compartment enclosed by the body, the main compartment to provide a controlled environment, a holding device within the main compartment, the holding device to hold a plurality of semiconductor wafers, a top latching mechanism configured to connect to another pod or a carrier mechanism of an overhead hoist transfer (OHT) system, a bottom latching mechanism configured to connect to another pod, the bottom latching mechanism being similar to the latching mechanism on the carrier.

Claims (39)

1. A wafer transportation pod comprising:

a body;

a main compartment enclosed by the body, the main compartment configured to provide a controlled environment;

a holding device within the main compartment, the holding device to hold a plurality of semiconductor wafers;

a top latching mechanism configured to selectively connect to another pod or a carrier mechanism of an overhead hoist transfer (OHT) system;

a bottom latching mechanism configured to selectively connect to a top latching mechanism of another pod by rotation of the body of the wafer transportation pod with respect to the other pod.

2. The wafer transportation pod of claim 1 , wherein the pod is configured for use with an Automated Material Handling System (AMHS).

3. The wafer transportation pod of claim 2 , wherein the AMHS is configured to move the semiconductor wafer pod while the other semiconductor wafer transportation pod is secured to a loading mechanism, thereby unlatching the first semiconductor wafer transportation pod from the other semiconductor wafer transportation pod.

4. The wafer transportation pod of claim 1 , wherein the pod comprises a front opening door.

5. The wafer transportation pod of claim 4 , wherein the holding device within the pod is configured to provide the semiconductor wafers thereon to robotic mechanisms that move the semiconductor wafers into fabrication tools.

6. The wafer transportation pod of claim 1 , wherein the top latching mechanism is positioned at a center of a top of the pod.

7. The wafer transportation pod of claim 6 , wherein the top latching mechanism is configured to lock and unlock to the other pod or the carrier by rotation.

8. The wafer transportation pod of claim 6 , wherein the bottom latching mechanism is positioned at a center of a bottom of the pod.

9. A semiconductor wafer pod transportation system comprising:

a carrier mechanism comprising a carrier latch to connect to a top latch of a first semiconductor wafer transportation pod, the first semiconductor wafer pod comprising:

a body;

a main compartment enclosed by the body, the main compartment to provide a controlled environment;

a holding device within the main compartment, the holding device to hold a plurality of semiconductor wafers; and

a bottom latch that is configured to attach to a top latch of a second semiconductor wafer transportation pod by rotation of the body of the first semiconductor wafer pod with respect to the second semiconductor wafer transportation pod.

10. The system of claim 9 , further comprising, the second semiconductor wafer transportation pod, the top latch of the second semiconductor wafer transportation pod being attached to the bottom latch of the first semiconductor wafer transportation pod.

11. The system of claim 10 , further comprising, a third semiconductor wafer transportation pod, a top latch of the third semiconductor wafer transportation pod being attached to a bottom latch of the second semiconductor wafer transportation pod.

12. The system of claim 10 , wherein the carrier mechanism is configured to move the first semiconductor wafer pod while the second semiconductor wafer transportation pod is secured to a loading mechanism, thereby unlatching the first semiconductor wafer transportation pod from the second semiconductor wafer transportation pod.

13. The system of claim 9 , further comprising, an Automated Material Handling System (AMHS).

14. The system of claim 9 , wherein the first semiconductor wafer transportation pod comprises a front opening door.

15. The system of claim 9 , wherein the top latch is positioned at a center of a top of the first semiconductor wafer transportation pod.

16. The system of claim 9 , wherein the bottom latch is positioned at a center of a bottom of the first semiconductor wafer transportation pod.

17. The system of claim 9 , wherein the top latch and the bottom latch are rotational latches.

18. The system of claim 9 , wherein the carrier latch is configured to latch to or unlatch from the top latch of the first semiconductor wafer transportation pod by rotation.

19. A system comprising:

a carrier mechanism comprising a carrier latch to connect to a top latch of a first semiconductor wafer transportation pod, the first semiconductor wafer pod comprising:

a body;

a main compartment enclosed by the body, the main compartment to provide a controlled environment;

a holding device within the main compartment, the holding device to hold a plurality of semiconductor wafers; and

a bottom latch; and

a control system comprising a processor and a memory, the memory comprising machine readable instructions that when executed by the processor, cause the control system to:

cause the carrier mechanism to latch onto a top latch of the first semiconductor wafer transportation pod; and

cause the carrier mechanism to move the first semiconductor wafer transportation pod such that the bottom latch of the first semiconductor wafer transportation pod latches to a top latch of a second semiconductor wafer transportation pod;

wherein the control system is further configured to cause the carrier mechanism to move the first semiconductor wafer pod while the second semiconductor wafer transportation pod is secured to a loading mechanism, thereby unlatching the first semiconductor wafer transportation pod from the second semiconductor wafer transportation pod.

20. The system of claim 19 , wherein the control system is further configured to cause the carrier to move while the first semiconductor wafer transportation pod is secured to a loading mechanism, thereby unlatching the first semiconductor wafer transportation pod from the carrier.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2014
From: HSIEH, WEN-YAO; HSIEH, WEN-KAI; LIU, SI-HENG; KAI, LIN HUNG; CHIU, SHAO-HAO
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 032759/0090 →
Continuity (1)
Related Publication 20150235883A1 · Aug 20, 2015