System to control a width of a programming threshold voltage distribution width when writing hot-read data
View Patent ↗An apparatus comprising a memory and a controller. The memory is configured to process a plurality of read/write operations. The memory comprises a plurality of memory modules. Each memory module has a size less than a total size of the memory. The controller is configured to write user data using a plurality of threshold voltages. The data considered hot-read data is written using a first voltage threshold. The data not considered hot-read data is written using a second voltage threshold. The first voltage threshold reduces an impact on endurance of the memory.
1. An apparatus comprising:
a memory configured to store data, the memory comprising a plurality of memory modules each having a size less than a total size of the memory; and
a controller configured to (A) process a plurality of read/write operations and (B) write the data using a plurality of threshold voltages, wherein (i) data considered hot-read data is written using a first voltage threshold, (ii) data not considered hot-read data is written using a second voltage threshold, and (iii) the first voltage threshold reduces an impact on endurance of the memory.
2. The apparatus according to claim 1 , wherein the first voltage threshold results in faster reads, fewer read retries, less recycling of hot-read data, and saves power when reading from the memory.
3. The apparatus according to claim 1 , wherein the threshold voltages are implemented using incremental step pulse programming.
4. The apparatus according to claim 1 , wherein a voltage pulse width distribution of the first voltage threshold is narrower than a voltage pulse width distribution of the second voltage threshold.
5. The apparatus according to claim 1 , wherein the first voltage threshold is generated using slow programming.
6. The apparatus according to claim 5 , wherein the slow programming of the memory occurs during an idle time.
7. The apparatus according to claim 5 , wherein the slow programming of the memory occurs during a garbage collection state.
8. The apparatus according to claim 5 , wherein the slow programming of the memory occurs during a data recycling state.
9. The apparatus according to claim 5 , wherein the slow programming does not affect the performance of the apparatus.
10. The apparatus according to claim 5 , wherein the data is read from an original location if the hot-read data is read during the slow programming.
11. The apparatus according to claim 1 , wherein the controller calculates the hot-read data by keeping track of a number of read operations on the memory during data reading operations and determines if the number of read operations is above a threshold value.
12. The apparatus according to claim 11 , wherein the data is classified as hot-read data if the number of read operations is above the threshold value and is classified as non hot-read data if the number of read operations is not above the threshold value.
13. The apparatus according to claim 11 , wherein the controller selects the hottest subset of hot-read data for recycling with distribution width control when hot-read data is above a predetermined amount.
14. A method for controlling a solid state drive, comprising the steps of:
configuring a memory to store data, the memory comprising a plurality of memory modules each having a size less than a total size of the memory;
processing a plurality of read/write operations; and
writing the data using a plurality of threshold voltages, wherein (i) data considered hot-read data is written using a first voltage threshold, (ii) data not considered hot-read data is written using a second voltage threshold, and (iii) the first voltage threshold reduces an impact on endurance of the memory.
15. An apparatus comprising:
a memory configured to store data, the memory comprising a plurality of memory modules each having a size less than a total size of the memory; and
means for (A) processing a plurality of read/write operations and (B) writing the data using a plurality of threshold voltages, wherein (i) data considered hot-read data is written using a first voltage threshold, (ii) data not considered hot-read data is written using a second voltage threshold, and (iii) the first voltage threshold reduces an impact on endurance of the memory.