IP Library › Granted Patent US 9,190,005
Granted Patent B2
US 9,190,005 · App. 14/197,763 · Granted Nov 17, 2015

Display panel

Inventors: Hirofumi Watsuda (Miao-Li County, TW); Shuji Hagino (Miao-Li County, TW)
Assignee: INNOLUX CORPORATION
G09G3/3648G09G2300/0404G09G2300/0426G09G2300/0478G09G2310/0297
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Quick Facts
Patent No.
US 9,190,005
App. No.
14/197,763
Granted
Nov 17, 2015
Kind
B2
Abstract

A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Claims (29)

1. A display panel, comprising:

a display area,

a plurality of scan lines and data lines crossing each other within the display area, wherein at least two of the data lines have different capacitances;

a data driving circuit outputting a plurality of control signal and a data signal; and

a demultiplexing unit having a plurality of thin-film transistors coupled with the data driving circuit and the data lines, wherein the thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals,

wherein the channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

2. The display panel according to claim 1 , wherein the display area is formed in a shape consisting of circle, shell, semicircle, oval, triangle, rhombus, trapezoid, polygon, or any combinations thereof.

3. The display panel according to claim 1 , wherein each of the thin-film transistors (TFTs) has a control terminal receiving one of the control signals, an input terminal receiving the data signal and an output terminal outputting the data signal.

4. The display panel according to claim 3 , wherein the data driving circuit is coupled with the control terminal of the TFT through a control signal line.

5. The display panel according to claim 3 , wherein the data driving circuit is coupled with the input terminal of the TFT through a data signal line.

6. The display panel according to claim 5 , wherein the data signal line is coupled with the input terminals of a plurality of TFTs.

7. The display panel according to claim 1 , wherein the plurality of TFTs include a first TFT and a second TFT, and the plurality of data lines include a first data line coupled with the first TFT and a second data line coupled with the second TFT, wherein the capacitance of the second data line is greater than that of the first data line, and the width of the channel layer of the second TFT is greater than that of the first TFT.

8. The display panel according to claim 1 , wherein the plurality of TFTs include a first TFT, a second TFT, and a third TFT, and the plurality of data lines include a first data line, a second data line, and a third data line coupled with the first, second, and third TFTs respectively, wherein the capacitance of the second data line is smaller than that of the third data line and is greater than that of the first data line, and the width of the channel layer of the second TFT is smaller than that of the third TFT and is greater than that of the first TFT.

9. The display panel according to claim 1 , wherein the plurality of TFTs include a first TFT and a second TFT, and the plurality of data lines include a first data line coupled with the first TFT and a second data line coupled with the second TFT, wherein the length of the second data line is greater than that of the first data line, and the width of the channel layer of the second TFT is greater than that of the first TFT.

10. The display panel according to claim 1 , wherein the plurality of TFTs include a first TFT, a second TFT, and a third TFT, and the plurality of data lines include a first data line, a second data line, and a third data line coupled with the first, second, and third TFTs respectively, wherein the length of the second data line is smaller than that of the third data line and is greater than that of the first data line, and the width of the channel layer of the second TFT is smaller than that of the third TFT and is greater than that of the first TFT.

11. The display panel according to claim 1 , wherein the demultiplexing unit includes a plurality of TFT groups, wherein each of the TFT groups is composed of at least two TFTs with the channel layers having the same width.

12. The display panel according to claim 11 , wherein the channel layers of the TFTs in the different TFT groups have different widths.

13. The display panel according to claim 11 further comprising at least one auxiliary capacitor, wherein one terminal of the auxiliary capacitor is coupled to the data line that is coupled with the corresponding TFT, and the other terminal thereof is coupled to an electrode.

14. The display panel according to claim 11 further comprising at least one auxiliary capacitor, wherein one terminal of the auxiliary capacitor is coupled to the data line that is coupled with the corresponding TFT, and the other terminal thereof is coupled to one of the control signal lines that is coupled with the corresponding TFT.

15. A display panel, comprising:

a display area,

a plurality of scan lines and data lines crossing each other within the display area, wherein at least two of the data lines have different capacitances;

a data driving circuit outputting a plurality of control signal and a data signal;

a demultiplexing unit having a plurality of thin-film transistors coupled with the data driving circuit and the data lines, wherein the thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines according to the control signals; and

at least two auxiliary capacitors, wherein the at least two auxiliary capacitors are coupled to the at least two data lines respectively, wherein the at least two auxiliary capacitors have different capacitances.

16. The display panel according to claim 15 , wherein one terminal of the auxiliary capacitor is coupled to the corresponding data line, and wherein the other one terminal of the auxiliary capacitor is coupled to an electrode, and wherein the data line is insulated from the electrode.

17. The display panel according to claim 15 , wherein each of the thin-film transistors (TFTs) has a control terminal receiving one of the control signals, an input terminal receiving the data signal, and an output terminal outputting the data signal.

18. The display panel according to claim 17 , wherein the data driving circuit is coupled with the control terminal of the TFT through a control signal line.

19. The display panel according to claim 18 , wherein one terminal of the auxiliary capacitor is coupled to the corresponding data line, and wherein the other one terminal of the auxiliary capacitor is coupled to the control signal line, and wherein the data line is insulated from the control signal line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2014
From: WATSUDA, HIROFUMI; HAGINO, SHUJI
To: INNOLUX CORPORATION
Reel/Frame 032357/0534 →
Continuity (1)
Related Publication 20150255030A1 · Sep 10, 2015