IP Library › Granted Patent US 9,379,200
Granted Patent B2
US 9,379,200 · App. 14/197,912 · Granted Jun 28, 2016

Memory with a silicide charge trapping layer

Inventor: Kazuaki Nakajima (Yokkaichi, JP)
Assignee: KABUSHIKI KAISHA TOSHIBA
H01L29/517H01L21/28273H01L27/11521H01L29/42324H01L29/42332H01L29/7881
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,379,200
App. No.
14/197,912
Granted
Jun 28, 2016
Kind
B2
Abstract

A semiconductor device according to the present embodiment includes a semiconductor substrate. A first insulating film is provided on the semiconductor substrate. A charge trap layer is provided on the first insulating film and the charge trap layer includes a silicide layer made of a metal silicide. A second insulating film is provided on the charge trap layer. A control gate electrode is provided on the second insulating film.

Claims (19)

1. A semiconductor device comprising:

a semiconductor substrate;

a first insulating film on the semiconductor substrate;

a charge trap layer on the first insulating film, the charge trap layer including a silicide layer made of a metal silicide and including a first semiconductor layer between the first insulating film and the silicide layer;

a second insulating film on the charge trap layer;

a control gate electrode on the second insulating film; and

a nitride film between the first semiconductor layer and the silicide layer.

2. The device of claim 1 further comprising:

a second semiconductor layer between the nitride film and the silicide layer.

3. The device of claim 2 , wherein

the first and second semiconductor layers are made of polysilicon, and

the nitride film is made of a silicon nitride film.

4. The device of claim 2 , wherein

the silicide layer is made of any one of Ru 2 Si 3 , Ir 2 Si 3 and Rh 2 Si 3 ,

the first and second semiconductor layers are made of polysilicon, and

the nitride film is made of a silicon nitride film.

5. The device of claim 1 , wherein nitrogen is added to the silicide layer.

6. The device of claim 1 , wherein the silicide layer is made of any one of Ru 2 Si 3 , Ir 2 Si 3 , and Rh 2 Si 3 .

7. The device of claim 1 , wherein the second insulating film is made of a high-dielectric material having a higher relative permittivity than that of a silicon dioxide film.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2014
From: NAKAJIMA, KAZUAKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 032357/0074 →
Continuity (2)
Provisional Application 61915768 · Dec 13, 2013
Related Publication 20150171184A1 · Jun 18, 2015