Semiconductor device
View Patent ↗The semiconductor device includes an oxide semiconductor layer including a plurality of channel formation regions arranged in the channel width direction and parallel to each other and a gate electrode layer covering a side surface and a top surface of each channel formation region with a gate insulating layer placed between the gate electrode layer and the channel formation regions. With this structure, an electric field is applied to each channel formation region from the side surface direction and the top surface direction. This makes it possible to favorably control the threshold voltage of the transistor and improve the S value thereof. Moreover, with the plurality of channel formation regions, the transistor can have increased effective channel width; thus, a decrease in on-state current can be prevented.
1. A semiconductor device comprising:
a first oxide layer comprising at least one of indium, gallium and zinc;
an oxide semiconductor layer including a first channel formation region and a second channel formation region, the oxide semiconductor layer being in contact with a top surface of the first oxide layer;
a second oxide layer in contact with a top surface of the oxide semiconductor layer and comprising at least one of indium, gallium and zinc;
a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer;
a gate electrode layer covering a side surface and a top surface of the first channel formation region and a side surface and a top surface of the second channel formation region; and
a gate insulating layer between the oxide semiconductor layer and the gate electrode layer,
wherein a portion of the first oxide layer is surrounded by the oxide semiconductor layer when seen from a direction perpendicular to a surface of the first oxide layer, and
wherein the second oxide layer is in contact with a top surface of the portion of the first oxide layer.
2. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer contains indium, gallium and zinc.
3. The semiconductor device according to claim 1 , wherein the second oxide layer covers the side surface and the top surface of the first channel formation region and the side surface and the top surface of the second channel formation region.
4. The semiconductor device according to claim 1 , wherein an end portion of the first oxide layer, an end portion of the oxide semiconductor layer, and an end portion of the second oxide layer are aligned with each other in a cross section.
5. The semiconductor device according to claim 1 ,
wherein the source electrode layer is in contact with one of side surfaces of the first oxide layer and one of side surfaces and a part of a top surface of the oxide semiconductor layer, and
wherein the drain electrode layer is in contact with the other of the side surfaces of the first oxide layer and the other of the side surfaces and another part of the top surface of the oxide semiconductor layer.
6. The semiconductor device according to claim 1 , further comprising:
a base insulating layer below the first oxide layer,
wherein the base insulating layer comprises oxygen, and
wherein the base insulating layer is capable of supplying oxygen to the oxide semiconductor layer.
7. The semiconductor device according to claim 1 , wherein the gate electrode layer overlaps with an end portion of the source electrode layer and an end portion of the drain electrode layer.
8. A semiconductor device comprising:
a first gate electrode layer;
a first gate insulating layer over the first gate electrode layer;
a first oxide layer over the first gate insulating layer and comprising at least one of indium, gallium and zinc;
an oxide semiconductor layer including a first channel formation region and a second channel formation region, the oxide semiconductor layer being in contact with a top surface of the first oxide layer, wherein the first channel formation region and the second channel formation region overlap with the first gate electrode layer;
a second oxide layer in contact with a top surface of the oxide semiconductor layer and comprising at least one of indium, gallium and zinc;
a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer;
a second gate electrode layer covering a side surface and a top surface of the first channel formation region and a side surface and a top surface of the second channel formation region; and
a second gate insulating layer between the oxide semiconductor layer and the second gate electrode layer,
wherein a portion of the first oxide layer is surrounded by the oxide semiconductor layer when seen from a direction perpendicular to a surface of the first oxide layer, and
wherein the second oxide layer is in contact with a top surface of the portion of the first oxide layer.
9. The semiconductor device according to claim 8 , wherein the oxide semiconductor layer contains indium, gallium and zinc.
10. The semiconductor device according to claim 8 , wherein the second oxide layer covers the side surface and the top surface of the first channel formation region and the side surface and the top surface of the second channel formation region.
11. The semiconductor device according to claim 8 , wherein an end portion of the first oxide layer, an end portion of the oxide semiconductor layer, and an end portion of the second oxide layer are aligned with each other in a cross section.
12. The semiconductor device according to claim 8 ,
wherein the source electrode layer is in contact with one of side surfaces of the first oxide layer and one of side surfaces and a part of a top surface of the oxide semiconductor layer, and
wherein the drain electrode layer is in contact with the other of the side surfaces of the first oxide layer and the other of the side surfaces and another part of the top surface of the oxide semiconductor layer.
13. The semiconductor device according to claim 8 ,
wherein the first gate insulating layer comprises oxygen, and
wherein the first gate insulating layer is capable of supplying oxygen to the oxide semiconductor layer.
14. The semiconductor device according to claim 8 , wherein the second gate electrode layer does not overlap with the source electrode layer and the drain electrode layer.